DAC1201D125 12-bit DAC Datasheet

DAC1201D125 Datasheet, PDF, Equivalent


Part Number

DAC1201D125

Description

Dual 12-bit DAC

Manufacture

IDT

Total Page 26 Pages
Datasheet
Download DAC1201D125 Datasheet


DAC1201D125
DAC1201D125
Dual 12-bit DAC, up to 125 Msps
Rev. 03 — 2 July 2012
Product data sheet
1. General description
The DAC1201D125 is a dual-port, high-speed, 2-channel CMOS Digital-to-Analog
Converter (DAC), optimized for high dynamic performance with low power dissipation.
Supporting an update rate of up to 125 Msps, the DAC1201D125 is suitable for Direct IF
applications.
Separate write inputs allow data to be written to the two DAC ports independently of one
another. Two separate clocks control the update rate of each DAC port.
The DAC1201D125 can interface two separate data ports or one single interleaved
high-speed data port. In Interleaved mode, the input data stream is demultiplexed into its
original I and Q data and latched. The I and Q data is then converted by the two DACs
and updated at half the input data rate.
Each DAC port has a high-impedance differential current output, suitable for both
single-ended and differential analog output configurations.
The DAC1201D125 is pin compatible with the AD9765, DAC2902 and DAC5662.
2. Features and benefits
Dual 12-bit resolution
125 Msps update rate
Single 3.3 V supply
Dual-port or Interleaved data modes
1.8 V, 3.3 V and 5 V compatible digital
inputs
Internal and external reference
2 mA to 20 mA full-scale output current
Typical 185 mW power dissipation
16 mW power-down
SFDR: 81 dBc; fo = 1 MHz; fs = 52 Msps
SFDR: 78 dBc; fo = 10.4 MHz; fs = 78
Msps
SFDR: 74 dBc; fo = 1 MHz;
fs = 52 Msps; 12 dBFS
LQFP48 package
Industrial temperature range of
40 C to +85 C
3. Applications
Quadrature modulation
Medical/test instrumentation
Direct IF applications
Direct digital frequency synthesis
Arbitrary waveform generator
®

DAC1201D125
Integrated Device Technology
DAC1201D125
Dual 12-bit DAC, up to 125 Msps
4. Ordering information
Table 1. Ordering information
Type number
Package
Name
Description
DAC1201D125HL LQFP48 plastic low profile quad flat package; 48 leads; body 7 7 1.4 mm
5. Block diagram
Version
SOT313-2
DA11 to DA0
WRTA/IQWRT
CLKA/IQCLK
CLKB/IQRESET
WRTB/IQSEL
DB11 to DB0
12 INPUT A 12
LATCH
DAC A 12
LATCH
DAC
A
DAC1201D125
REFERENCE
CONTROL
AMPLIFIER
12 INPUT B 12
LATCH
DAC B 12
LATCH
DAC
B
VDDA AGND VDDD DGND
Fig 1. Block diagram
IOUTAP
IOUTAN
REFIO
AVIRES
BVIRES
GAINCTRL
PWD
IOUTBP
IOUTBN
001aai976
DAC1201D125 3
Product data sheet
Rev. 03 — 2 July 2012
© IDT 2012. All rights reserved.
2 of 26


Features DAC1201D125 Dual 12-bit DAC, up to 125 M sps Rev. 03 — 2 July 2012 Product da ta sheet 1. General description The DA C1201D125 is a dual-port, high-speed, 2 -channel CMOS Digital-to-Analog Convert er (DAC), optimized for high dynamic pe rformance with low power dissipation. S upporting an update rate of up to 125 M sps, the DAC1201D125 is suitable for Di rect IF applications. Separate write in puts allow data to be written to the tw o DAC ports independently of one anothe r. Two separate clocks control the upda te rate of each DAC port. The DAC1201D1 25 can interface two separate data port s or one single interleaved high-speed data port. In Interleaved mode, the inp ut data stream is demultiplexed into it s original I and Q data and latched. Th e I and Q data is then converted by the two DACs and updated at half the input data rate. Each DAC port has a high-im pedance differential current output, su itable for both single-ended and differ ential analog output configurations. The DAC1201D125 is pin compa.
Keywords DAC1201D125, datasheet, pdf, IDT, Dual, 12-bit, DAC, AC1201D125, C1201D125, 1201D125, DAC1201D12, DAC1201D1, DAC1201D, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)