DAC1403D160 14-bit DAC Datasheet

DAC1403D160 Datasheet, PDF, Equivalent


Part Number

DAC1403D160

Description

Dual 14-bit DAC

Manufacture

IDT

Total Page 18 Pages
Datasheet
Download DAC1403D160 Datasheet


DAC1403D160
DAC1403D160
Dual 14 bits DAC, up to 160 MHz, 2 x interpolating
Rev. 03 — 2 July 2012
Product data sheet
1. General description
The DAC1403D160 is optimized to reduce architecture complexity and overall system
cost. It leads to dynamic performance in multi-carrier support, because of its direct IF
conversion capabilities. With an internal sampling rate of up to 160 MHz, DAC1403D160
is an extremely competitive solution for broadband wireless systems transmitters, as well
as a wide range of applications.
2. Features
Dual 14-bit resolution
Spurious-Free Dynamic Range (SFDR) = 80 dBc at 2.5 MHz
Input data rate up to 80 MHz
2 interpolation filter
Output data rate up to 160 MHz
Single 3.3 V power supply
Low noise capacitor-free integrated Phase-Locked Loup (PLL)
Low power dissipation
HTQFP80 package
Ambient temperature from 40 C to +85 C
3. Applications
Broadband wireless systems
Digital radio links
Cellular base stations
Instrumentation
Cable modem
Cable Modem Termination System (CMTS)/Data Over Cable Service Interface
Specification (DOCSIS)
®

DAC1403D160
Integrated Device Technology
DAC1403D160
Dual 14 bits DAC, up to 160 MHz, 2 x interpolating
4. Ordering information
Table 1. Ordering information
Type number
Package
Name
Description
DAC1403D160HW HTQFP80 plastic thermal enhanced thin quad flat package; 80 leads;
body 12 12 1 mm; exposed die pad
5. Block diagram
Version
SOT841-1
I13 to I0
CLK
CLKN
Q13 to Q0
DAC1403D160
VCCA
U/I
60
11 to 16,
19 to 24,
27, 28
LATCH
14 14 FIR 14
DAC
73
72
5
CLOCK
6 DRIVER
31 to 34,
37 to 42,
45 to 48
14
LATCH
14
(CLK × 2)
PLL
(CLK × 2)
INTERNAL 58
BAND GAP
(CLK × 2)
DAC
FIR 14
57
69
68
IVIRES
IOUT
IOUTN
GAPOUT
GAPD
QOUT
QOUTN
i.c. 2, 8
VCCD 10, 51
(1) (2) (3) (4)
VCCA
VCCA AGND DGND DEC
(1) Pins 1, 3, 61, 65, 76 and 80.
(2) Pins 4, 7, 62, 64, 66, 67, 70, 71, 74, 75, 77 and 79.
(3) Pins 9, 17, 25, 29, 30, 35, 44, 49, 50, 52, 53, 54, 55 and 56.
(4) Pins 18, 26, 36, 43, 63 and 78.
Fig 1. Block diagram
U/I 59 QVIRES
014aaa509
DAC1403D160 3
Product data sheet
Rev. 03 — 2 July 2012
© IDT 2012. All rights reserved.
2 of 18


Features DAC1403D160 Dual 14 bits DAC, up to 160 MHz, 2 x interpolating Rev. 03 — 2 July 2012 Product data sheet 1. Gener al description The DAC1403D160 is optim ized to reduce architecture complexity and overall system cost. It leads to dy namic performance in multi-carrier supp ort, because of its direct IF conversio n capabilities. With an internal sampli ng rate of up to 160 MHz, DAC1403D160 i s an extremely competitive solution for broadband wireless systems transmitter s, as well as a wide range of applicati ons. 2. Features  Dual 14-bit resolu tion  Spurious-Free Dynamic Range (S FDR) = 80 dBc at 2.5 MHz  Input data rate up to 80 MHz  2  interpolat ion filter  Output data rate up to 1 60 MHz  Single 3.3 V power supply Low noise capacitor-free integrated P hase-Locked Loup (PLL)  Low power di ssipation  HTQFP80 package  Ambie nt temperature from 40 C to +85 C 3. Applications  Broadband wirel ess systems  Digital radio links  Cellular base stations  Instrumentation  Cable modem  Ca.
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