STWLC68 power receiver Datasheet

STWLC68 Datasheet, PDF, Equivalent


Part Number

STWLC68

Description

Qi-compliant inductive wireless power receiver

Manufacture

STMicroelectronics

Total Page 30 Pages
Datasheet
Download STWLC68 Datasheet


STWLC68
STWLC68
Datasheet
Qi-compliant inductive wireless power receiver for 5W applications
Product status link
STWLC68
Product summary
Order code
STWLC68JRH
Package
Flip Chip (3.29 x
3.70 mm)
Packing
Tape and reel
Features
• Up to 5 W output power
• Qi 1.2.4 inductive wireless standard communication protocol compliant
• Integrated 27 V synchronous rectifier with 98% (typ.) efficiency
• Low drop-out linear regulator with output current and input voltage control loops
• 3.6 V to 20 V programmable output voltage with 25 mV resolution
• Up to 80% overall system efficiency
• 32-bit, 64 MHz ARM Cortex microcontroller core
• OTP memory for configuration data
• 8-channels, 10-bit A/D Converter
• 6 configurable GPIOs
• Accurate voltage/current measurement for Foreign Object Detection (FOD)
• Output Over-Voltage clamping protection
• 400 kHz I2C interface
• On-chip thermal management and protections (Over-voltage, Over-current)
• Enhanced power dissipation capability Chip-Scale Package (CSP)
Application
• Smartphones and PDAs
• Power banks
• GPS navigators
• Medical and healthcare equipment
• Wearable devices
Description
The STWLC68 is an integrated Wireless Power Receiver suitable for portable
applications and capable of managing up to 5 W of output power. The chip has been
designed to support Qi 1.2.4 specifications for inductive communication protocol and
Base Power Profile (BPP).
The STWLC68 shows excellent efficiency performance thanks to the integrated low-
loss synchronous rectifier and the low drop-out linear regulator: both elements are
dynamically managed by the digital core to minimize the overall power dissipation
over a wide range of output load conditions.
Through the I2C interface the user can access and modify different configuration
parameters, tailoring the operation of the device to the needs of custom applications.
The configuration parameters can be saved in the embedded OTP memory and
automatically retrieved at power-up, allowing the STWLC68 to operate as stand-
alone device.
The STWLC68 is housed in a Chip-Scale Package to fit real-estate solutions in
wearable devices.
DS13131 - Rev 1 - January 2020
For further information contact your local STMicroelectronics sales office.
www.st.com

STWLC68
STWLC68
Introduction
1 Introduction
STWLC68 is a Wireless Power Receiver that rectifies the AC voltage developed across the receiving coil and
provides a regulated DC voltage at the output.
The 32-bit core MCU is the supervisor of the whole device and manages all the functional blocks to
• establish and maintain communication with the transmitter,
• ensure adherence to Qi standard specifications (wherever required),
• optimize the efficiency by properly adjusting the operating point
• guarantee reliability by monitoring and protecting both the load and the device itself.
In order to execute the above mentioned (and many others) task, the MCU core relies on a resident firmware
stored in ROM memory. In addition, some configuration parameters (e.g. output voltage, FOD tuning parameters,
etc.) can be saved in the internal One-Time Programmable (OTP) memory and retrieved at power-up, allowing the
STWLC68 to operate as a fully autonomuous stand-alone chip.
Applications in which the host system directly monitors or controls the power transfer, the I2C interface provides
full access to the internal registers of the STWLC68.
The device is also equipped with six programmable general-purpose I/O pins (GPIOs) to implement specific
functions (e.g. driving status LEDs, enabling the output on request, informing the host system about faulty
conditions, etc.).
Figure 1 shows the block diagram of the device with simplified interconnections among the functional blocks. The
synchronous rectifier converts the AC voltage from the receiving coil into a DC voltage at the VRECT pin. The
four switches of the rectifier (that is basically an H-bridge) are controlled by the digital core in order to minimize
both conduction and switching losses as a function of the output voltage and current, both monitored by two
channels of the ADC. Two bootstrap capacitors are externally connected to the BOOT1-BOOT2 pins to correctly
drive the high-side switches of the rectifier.
The output of the rectifier, filtered by an external capacitor, is also the input rail for the main LDO linear regulator
and for the auxiliary linear regulators in charge of deriving the 5 V and 1.8 V supply voltages.
The digital core has full control of the main LDO linear regulator in order to manage the output voltage, the output
current and the drop-out voltage: since the most relevant contribution to the total chip power dissipation is due to
the main linear regulator, minimizing its drop-out voltage is a key factor.
Of course the minimization of the drop-out voltage requires a closed loop regulation of the voltage at the VRECT
pin, i.e. a feedback information that is sent to the transmitter (via ASK modulation) which, in turn, adjusts the
delivered power by acting on the supply voltage, the switching frequency or the switching duty-cycle (or a
combination of the three) of its own power stage, depending on the adopted technique.
This regulation loop involving the transmitter is an essential part of the wireless power transmission and is
extensively described in Qi specifications.
DS13131 - Rev 1
page 2/33


Features STWLC68 Datasheet Qi-compliant inductive wireless power receiver for 5W applica tions Product status link STWLC68 Pro duct summary Order code STWLC68JRH P ackage Flip Chip (3.29 x 3.70 mm) Pac king Tape and reel Features • Up to 5 W output power • Qi 1.2.4 inductiv e wireless standard communication proto col compliant • Integrated 27 V synch ronous rectifier with 98% (typ.) effici ency • Low drop-out linear regulator with output current and input voltage c ontrol loops • 3.6 V to 20 V programm able output voltage with 25 mV resoluti on • Up to 80% overall system efficie ncy • 32-bit, 64 MHz ARM Cortex micro controller core • OTP memory for conf iguration data • 8-channels, 10-bit A /D Converter • 6 configurable GPIOs Accurate voltage/current measurement for Foreign Object Detection (FOD) • Output Over-Voltage clamping protectio n • 400 kHz I2C interface • On-chip thermal management and protections (Ov er-voltage, Over-current) • Enhanced power dissipation capability Chip-Scale Package (CSP) .
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