LC87F0K08A 8-bit Microcontroller Datasheet

LC87F0K08A Datasheet, PDF, Equivalent


Part Number

LC87F0K08A

Description

8-bit Microcontroller

Manufacture

ON Semiconductor

Total Page 24 Pages
Datasheet
Download LC87F0K08A Datasheet


LC87F0K08A
LC87F0K08A
8-bit Microcontroller
8K-byte Flash ROM / 384-byte RAM / 24-pin
Overview
LC87F0K08A is an 8-bit microcomputer that, centered around a CPU
running at a minimum bus cycle time of 83.3 ns, integrates on a single chip a
number of hardware features such as 8K-byte flash ROM (onboard
programmable), 384-byte RAM, an on-chip debugger function, two
sophisticated 16-bit timers/counters (may be divided into 8-bit timers), two
8-bit timers with a prescaler, a synchronous SIO interface, a UART port(full
duplex), a 5-channel AD converter with 12/8-bit resolution selector, eight
analog comparators, two AMP circuits, PPG, a watchdog timer, an internal
reset circuit, a system clock frequency divider, and a 21-source 10-vector
interrupt feature.
www.onsemi.com
Features
Flash ROM
Capable of on-board programming with a power voltage range of 4.5 to 5.5 V
Block-erasable in 128 byte units
Writing in 2-byte units
8192 8 bits
RAM
384 9 bits
Package form
DIP24S, Pb-Free type
Minimum bus cycle time
83.3 ns (12 MHz)
Note: The bus cycle time here refers to the ROM read speed.
PDIP24 / DIP24S(300mil)
Minimum instruction cycle time
250 ns (12 MHz)
Ports
I/O ports
Ports whose I/O direction can be designated in 1 bit units :
Dedicated PPG output ports
Dedicated AMP/ CMP I/O ports
Reset pin
Dedicated on-chip debugger pin
Regulator output pin
Power pins
9 (P00 to P07, P30)
1 (PPG0)
9 (CMP1IA, CMP1IB, CMP2I, CMP4I, CMP45I,
CM5I, CMP6I, AMP1I, AMP2O)
1 (RES#)
1 (OWP0)
1 (VDC)
2 (VSS1, VDD1)
* This product is licensed from Silicon Storage Technology, Inc. (USA).
ORDERING INFORMATION
See detailed ordering and shipping information on page 24 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
April 2017 - Rev. 1
1
Publication Order Number :
LC87F0K08A/D

LC87F0K08A
LC87F0K08A
Timers
Timer 0 : 16-bit timer/counter with a capture register
Mode 0 : 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) 2 channels
Mode 1 : 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) + 8-bit
counter (with an 8-bit capture register)
Mode 2 : 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register)
Mode 3 : 16-bit counter (with a 16-bit capture register)
Timer 1 : 16-bit timer/counter
Mode 0 : 8-bit timer with an 8-bit prescaler + 8-bit timer/counter with an 8-bit prescaler
Mode 2 : 16-bit timer/counter with an 8-bit prescaler
Mode 3 : 16-bit timer with an 8-bit prescaler
Timer 6 : 8-bit timer with a 6-bit prescaler (with toggle outputs)
Timer 7 : 8-bit timer with a 6-bit prescaler (with toggle outputs)
Base timer
1) The clock is selectable from the system clock and timer 0 prescaler output.
2) Interrupts are programmable in 5 different time schemes
Serial interface
SIO1 : 8-bit synchronous serial interface
Mode 0 : Synchronous 8-bit serial I/O (2-wire configuration, 2 to 512 Tcyc transfer clocks)
Mode 2 : Bus mode 1 (start bit, 8 data bits, 2 to 512 Tcyc transfer clocks)
Mode 3 : Bus mode 2 (start detect, 8 data bits, stop detect)
UART
Full duplex
7 / 8 / 9 bit data bits selectable
1 stop bit (2 bits in continuous data transmission)
Built-in baudrate generator
AD converter : 12 bits 5 channels
12 / 8-bit AD converter resolution selectable
Remote control receiver circuit (multiplexed with P07 / INT3 / T0IN pin)
Noise rejection function (noise filter time constant selectable from 1 Tcyc / 32 Tcyc / 128 Tcyc)
Analog comparator : 8 channels
CMP1 :
"+" and "–" input pins
Output : For PPG output timing generation and capture timer input (INT2)
CMP2 :
"+" input pin,
"–" input is the internal Vref (user selectable options : 5/12, 6/12, or 7/12 VDD).
Output for interrupt flag setting (CMP2)
CMP3 :
"+" input is the output of AMP1.
"–" input is the internal Vref (user selectable options: 1/6, 2/6, 3/6, or 4/6 VDD).
Output for the PPG output control (only the existing cycle set to OFF), capture trigger of
pulse on time and interrupt flag set (CMP3)
CMP4 :
"+" and "–" input pins
Output for the PPG output control (forced OFF)
CMP5 :
"–" input pin, "+" input is multiplexed with the "–" input pin of CMP4
Output for the PPG output control (forced OFF)
CMP6 :
"+" input pin, "–" input is the internal Vref (register setting: 1/6, 2/6, 3/6, or 4/6 VDD)
Output for the PPG output control (forced OFF) and interrupt flag set (CMP6)
CMP7 :
"+" input is multiplexed with the "+" input pin of CMP2
"–" input is the internal Vref (user selectable options: 6/12, 7/12, or 8/12 VDD)
Output for the PPG output control (forced OFF) and interrupt flag set (CMP7).
CMP8 :
"+" input is multiplexed with the "+" input pin of CMP3
"–" input is the internal Vref (register setting: 1/6, 2/6, 3/6, or 4/6 VDD)
Output for capture trigger of pulse on time and interrupt flag set (CMP8)
www.onsemi.com
2


Features LC87F0K08A 8-bit Microcontroller 8K-byte Flash ROM / 384-byte RAM / 24-pin Ove rview LC87F0K08A is an 8-bit microcompu ter that, centered around a CPU running at a minimum bus cycle time of 83.3 ns , integrates on a single chip a number of hardware features such as 8K-byte fl ash ROM (onboard programmable), 384-byt e RAM, an on-chip debugger function, tw o sophisticated 16-bit timers/counters (may be divided into 8-bit timers), two 8-bit timers with a prescaler, a synch ronous SIO interface, a UART port(full duplex), a 5-channel AD converter with 12/8-bit resolution selector, eight ana log comparators, two AMP circuits, PPG, a watchdog timer, an internal reset ci rcuit, a system clock frequency divider , and a 21-source 10-vector interrupt f eature. www.onsemi.com Features  F lash ROM  Capable of on-board progra mming with a power voltage range of 4.5 to 5.5 V  Block-erasable in 128 byt e units  Writing in 2-byte units  8192  8 bits  RAM  384  9 bits  Package form  DIP24S, Pb-Free type.
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