FLASH MEMORY. W29N01GW Datasheet


W29N01GW MEMORY. Datasheet pdf. Equivalent


Part Number

W29N01GW

Description

1G-BIT 1.8V NAND FLASH MEMORY

Manufacture

Winbond

Total Page 30 Pages
Datasheet
Download W29N01GW Datasheet


W29N01GW
W29N01GZ/W
W29N01GZ/W
1G-BIT 1.8V
NAND FLASH MEMORY
Release Date: November 7, 2014
1 Revision F

W29N01GW
W29N01GZ/W
Table of Contents
1. GENERAL DESCRIPTION ............................................................................................................... 7
2. FEATURES....................................................................................................................................... 7
3. PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................... 8
3.1 Pin assignment 48 ball VFBGAX8/X16......................................................................... 8
3.2 Pin Descriptions.................................................................................................................... 9
4. PIN DESCRIPTIONS...................................................................................................................... 10
4.1 Chip Enable (#CE).............................................................................................................. 10
4.2 Write Enable (#WE)............................................................................................................ 10
4.3 Read Enable (#RE) ............................................................................................................ 10
4.4 Address Latch Enable (ALE) .............................................................................................. 10
4.5 Command Latch Enable (CLE) .......................................................................................... 10
4.6 Write Protect (#WP)............................................................................................................ 10
4.7 Ready/Busy (RY/#BY) ........................................................................................................ 10
4.8 Input and Output (I/Ox)....................................................................................................... 10
5. BLOCK DIAGRAM .......................................................................................................................... 11
6. MEMORY ARRAY ORGANIZATION.............................................................................................. 12
6.1 X8 Array Organization ........................................................................................................ 12
6.2 X16 Array Organization ...................................................................................................... 13
7. MODE SELECTION TABLE ........................................................................................................... 14
8. COMMAND TABLE ........................................................................................................................ 15
9. DEVICE OPERATIONS.................................................................................................................. 16
9.1 READ operation.................................................................................................................. 16
9.1.1 PAGE READ (00h-30h).........................................................................................................16
9.1.2 CACHE READ OPERATIONS ..............................................................................................17
9.1.3 RANDOM DATA OUTPUT (05h-E0h) ...................................................................................21
9.1.4 READ ID (90h) ......................................................................................................................22
9.1.5 READ PARAMETER PAGE (ECh) .......................................................................................23
9.1.6 READ STATUS (70h) ...........................................................................................................25
9.1.7 READ UNIQUE ID (EDh) ......................................................................................................27
9.2 PROGRAM operation ......................................................................................................... 28
9.2.1 PAGE PROGRAM (80h-10h) ................................................................................................28
9.2.2 SERIAL DATA INPUT (80h)..................................................................................................28
9.2.3 RANDOM DATA INPUT (85h) ..............................................................................................29
9.2.4 CACHE PROGRAM (80h-15h) .............................................................................................29
9.3 COPY BACK operation....................................................................................................... 31
9.3.1 READ for COPY BACK (00h-35h) ........................................................................................31
9.3.2 PROGRAM for COPY BACK (85h-10h) ................................................................................31
9.4 BLOCK ERASE operation .................................................................................................. 33
9.4.1 BLOCK ERASE (60h-D0h)....................................................................................................33
9.5 RESET operation................................................................................................................ 34
9.5.1 RESET (FFh) ........................................................................................................................34
9.6 FEATURE OPERATION..................................................................................................... 35
Release Date: November 7, 2014
2 Revision F


Features W29N01GZ/W W29N01GZ/W 1G-BIT 1.8V NAND F LASH MEMORY Release Date: November 7, 2 014 1 – Revision F W29N01GZ/W Table of Contents 1. GENERAL DESCRIPTION .... ....................................... ....................................... ............................. 7 2. FEAT URES................................... ....................................... ....................................... ...................... 7 3. PACKAGE TYP ES AND PIN CONFIGURATIONS ............. ....................................... ...................... 8 3.1 Pin assign ment 48 ball VFBGA(X8/X16) ........ ....................................... .......................... 8 3.2 Pin De scriptions............................. ....................................... ....................................... ......... 9 4. PIN DESCRIPTIONS........ ....................................... ....................................... ................................ 10 4.1 Chip Enable (#CE)....................................................
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