DS1602 Time Counter Datasheet

DS1602 Datasheet, PDF, Equivalent


Part Number

DS1602

Description

Elapsed Time Counter

Manufacture

Maxim Integrated

Total Page 8 Pages
Datasheet
Download DS1602 Datasheet


DS1602
www. maxim-i c.com
DS1602
Elapsed Time Counter
www.maxim-ic.com
FEATURES
§ Two 32-bit counters keep track of real-time
and elapsed time
§ Counters keep track of seconds for over 125
PIN ASSIGNMENT
RST 1
DQ 2
8 VCC
7 X1
years
§ Battery powered counter counts seconds from
the time battery is attached until VBAT is less
than 2.5V
§ VCC powered counter counts seconds while
VCC is above VTP and retains the count in the
absence of VCC under battery backup power
§ Clear function resets selected counter to 0
§ Read/write serial port affords low pin count
§ Maximum current drain of less than 1 µA
from VBAT pin when serial port is disabled
§ One byte protocol defines read/write, counter
address and software clear function
§ 8-pin DIP or optional 8-pin SOIC
§ Operating temperature range of -40°C to
+85°C
§ Reduced performance operation down to
VCC = 2.5V
§ Underwriters Laboratory (UL) recognized
CLK
GND
3
4
6 X2
5 VBAT
DS1602
8-Pin DIP (300mil)
RST 1
DQ 2
8 VCC
7 X1
CLK 3 6 X2
GND 4
5 VBAT
DS1602
8-Pin SOIC (208mil)
Package Dimension Information
www.maxim-ic.com/TechSupport/DallasPackInfo.htm
PIN DESCRIPTION
RST
CLK
- Reset
- Clock
DQ - Data Input/Output
GND
- Ground
X1, X2
- Crystal Inputs
DESCRIPTION
VBAT
VCC
- + Battery Input
- +5V
The DS1602 is a real-time clock/elapsed time counter designed to count seconds when VCC power is
applied and continually count seconds under battery backup power with an additional counter regardless
of the condition of VCC. The continuous counter can be used to derive time of day, week, month, and year
by using a software algorithm. The VCC powered counter will automatically record the amount of time
that VCC power is applied. This function is particularly useful in determining the operational time of
equipment in which the DS1602 is used. Alternatively, this counter can also be used under software
control to record real-time eve nts. Communication to and from the DS1602 takes place via a 3-wire serial
port. A 1-byte protocol selects read/ write functions, counter clear functions and oscillator trim. A low
cost 32.768kHz crystal attaches directly to the X1 and X2 pins. If battery powered-only operation is
desired, the VBAT pin must be grounded and the VCC pin must be connected to the battery.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
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093002

DS1602
DS1602
OPERATION
The main elements of the DS1602 are shown in Figure 1. As shown, communications to and from the
elapsed time counter occur over a 3-wire serial port. The port is activated by driving RST to a high state.
With RST at high level, 8 bits are loaded into the protocol shift register providing read/write, register
select, register clear, and oscillator trim information. Each bit is serially input on the rising edge of the
clock input. After the first eight clock cycles have loaded the protocol register with a valid protocol,
additional clocks will output data for a read or input data for a write. VCC must be present to access the
DS1602. If VCC < VTP, the DS1602 goes into a battery backup mode which disables the serial port to
conserve battery capacity. For battery only operations, the VBAT pin must be grounded and the VCC pin
must be connected to the battery. This will keep the DS1602 out of battery backup mode. Battery
powered operation down to 2.5V is possible with reduced speed performance on the serial port. The 32-
bit continuous counter always runs provided that a valid supply is present and the oscillator is enabled.
The 32-bit VCC active counter is gated by VCC and the internal 1Hz signal.
PROTOCOL REGISTER
The protocol bit definition is shown in Figure 2. Valid protocols and the resulting actions are shown in
Table 1. Each data transfer to the protocol register designates what action is to occur. As defined, the
MSB (bit 7 which is designated ACC) selects the 32-bit continuous counter for access. If ACC is a logical
1 the continuous counter is selected and the 32 clock cycles that follow the protocol will either read or
write this counter. If the counter is being read, the contents will be latched into a different register at the
end of protocol and the latched contents will be read out on the next 32 clock cycles. This avoids reading
garbled data if the counter is clocked by the oscillator during a read. Similarly, if the counter is to be
written, the data is buffered in a register and all 32 bits are jammed into the counter simultaneously on the
rising edge of the 32nd clock. The next bit (bit 6 which is designated AVC) selects the 32-bit VCC active
counter for access. If AVC is a logical 1 this counter is selected and the 32 clock cycles that follow will
either read or write this counter. If both bit 7 and bit 6 are written to a logic high, all clock cycles beyond
the protocol are ignored and bits 5, 4, and 3 are loaded into the oscillator trim register. A value of binary 3
(011) will give a clock accuracy of ±120 seconds per month at +25°C. Increasing the binary number
towards 7 will cause the real- time clock to run faster. Conversely, lowering the binary number towards 0
will cause the clock to run slower. Binary 000 will stop the oscillator completely. This feature can be used
to conserve battery life during storage. In this mode the IBAT current is reduced to 100nA maximum. In
applications where oscillator trimming is not practical or not needed, a default setting of 011 is
recommended. Bit 2 of protocol (designated CCC) is used to clear the continuous counter. When set to
logic 1, the continuous counter will reset to 0 when RST is taken low. Bit 1 of protocol (designated CVC)
is used to clear the VCC active counter. When set to logical 1, the VCC active counter will reset to 0 when
RST is taken low. Both counters can be reset simultaneously by setting CCC and CVC both to a logical
1. Bit 0 of the protocol (designated RD) determines whether the 32 clocks to follow will write a counter
or read a counter. When RD is set to a logical 0 a write action will follow when RD is set to a logical 1 a
read action will follow. When sending the protocol, 8 bits should always be sent. Sending less than 8 bits
can produce erroneous results. If clearing the counters or trimming the oscillator, the data transfer can be
terminated after the 8-bit protocol is sent. However, when reading or writing the counters, 32 clock cycles
should always follow the protocol.
RESET AND CLOCK CONTROL
All data transfers are initiated by driving the RST input high. The RST input has two functions. First,
RST turns on the serial port logic, which allows access to the protocol register for the protocol data entry.
Second, the RST signal provides a method of terminating the protocol transfer or the 32-bit counter
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Features www. maxim-i c.com DS1602 Elapsed Time Counter www.maxim-ic.com FEATURES § Two 32-bit counters keep track of real- time and elapsed time § Counters keep track of seconds for over 125 PIN ASSI GNMENT RST 1 DQ 2 8 VCC 7 X1 years Battery powered counter counts second s from the time battery is attached unt il VBAT is less than 2.5V § VCC powere d counter counts seconds while VCC is a bove VTP and retains the count in the a bsence of VCC under battery backup powe r § Clear function resets selected cou nter to 0 § Read/write serial port aff ords low pin count § Maximum current d rain of less than 1 µA from VBAT pin w hen serial port is disabled § One byte protocol defines read/write, counter a ddress and software clear function § 8 -pin DIP or optional 8-pin SOIC § Oper ating temperature range of -40°C to +8 5°C § Reduced performance operation d own to VCC = 2.5V § Underwriters Labor atory (UL) recognized CLK GND 3 4 6 X2 5 VBAT DS1602 8-Pin DIP (300mil) RST 1 DQ 2 8 VCC 7 X1 CLK 3 6 X2 GND .
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