DS90CF564 LVDS Datasheet

DS90CF564 Datasheet, PDF, Equivalent


Part Number

DS90CF564

Description

LVDS

Manufacture

etcTI

Total Page 18 Pages
Datasheet
Download DS90CF564 Datasheet


DS90CF564
DS90CF563, DS90CF564
www.ti.com
SNLS107E – JULY 1997 – REVISED APRIL 2013
DS90CF563/DS90CF564 LVDS 18-Bit Color Flat Panel Display (FPD) Link - 65 MHz
Check for Samples: DS90CF563, DS90CF564
FEATURES
1
2 20 to 65 MHz Shift Clk Support
• Up to 171 Mbytes/s Bandwidth
• Cable Size is Reduced to Save Cost
• 290 mV Swing LVDS Devices for Low EMI
• Low Power CMOS Design (< 550 mW typ)
• Power-down Mode Saves Power (< 0.25 mW)
• PLL Requires No External Components
• Low Profile 48-Lead TSSOP Package
• Falling Edge Data Strobe
• Compatible with TIA/EIA-644 LVDS Standard
• Single Pixel Per Clock XGA (1024 x 768)
• Supports VGA, SVGA, XGA and Higher
• 1.3 Gbps Throughput
DESCRIPTION
The DS90CF563 transmitter converts 21 bits of
CMOS/TTL data into three LVDS (Low Voltage
Differential Signaling) data streams. A phase-locked
transmit clock is transmitted in parallel with the data
streams over a fourth LVDS link. Every cycle of the
transmit clock 21 bits of input data are sampled and
transmitted. The DS90CF564 receiver converts the
LVDS data streams back into 21 bits of CMOS/TTL
data. At a transmit clock frequency of 65 MHz, 18 bits
of RGB data and 3 bits of LCD timing and control
data (FPLINE, FPFRAME, DRDY) are transmitted at
a rate of 455 Mbps per LVDS data channel. Using a
65 MHz clock, the data throughput is 171 Mbytes per
second. These devices are offered with falling edge
data strobes for convenient interface with a variety of
graphics and LCD panel controllers.
This chipset is an ideal means to solve EMI and
cable size problems associated with wide, high speed
TTL interfaces.
Block Diagram
Figure 1. DS90CF563
DS90CF563MTD is no longer available.
Figure 2. DS90CF564
See Package Number DGG0048A
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2013, Texas Instruments Incorporated

DS90CF564
DS90CF563, DS90CF564
SNLS107E – JULY 1997 – REVISED APRIL 2013
Application
www.ti.com
Absolute Maximum Ratings(1)(2)
Supply Voltage (VCC)
CMOS/TTL Input Voltage
CMOS/TTL Output Voltage
LVDS Receiver Input Voltage
LVDS Driver Output Voltage
LVDS Output Short Circuit Duration
Junction Temperature
Storage Temperature
Lead Temperature (Soldering, 4 sec)
Maximum Package Power Dissipation @ +25°C
DGG0048A (TSSOP)
Package:
Package Derating:
This device does not meet 2000V ESD rating (3) .
DS90CF563
DS90CF564
DS90CF563
DS90CF564
0.3V to +6V
0.3V to (VCC + 0.3V)
0.3V to (VCC + 0.3V)
0.3V to (VCC + 0.3V)
0.3V to (VCC + 0.3V)
Continuous
+150°C
65°C to +150°C
+260°C
1.98W
1.89W
16 mW/°C above +25°C
15 mW/°C above +25°C
(1) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(2) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be verified. They are not meant to imply
that the device should be operated at these limits. The “Electrical Characteristics” specify conditions for device operation.
(3) ESD Rating: HBM (1.5 kΩ, 100 pF) PLL V CC 1000V All other pins 2000V EIAJ (0Ω, 200 pF) 150V
Recommended Operating Conditions
Supply Voltage (VCC)
Operating Free Air Temperature (TA)
Receiver Input Range
Supply Noise Voltage (VCC)
Min Nom Max
4.75 5.0 5.25
10 +25 +70
0 2.4
100
Units
V
°C
V
mVP-P
Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
Conditions
CMOS/TTL DC SPECIFICATIONS
VIH High Level Input Voltage
VIL Low Level Input Voltage
VOH High Level Output Voltage
VOL Low Level Output Voltage
IOH = 0.4 mA
IOL = 2 mA
Min Typ Max Units
2.0
GND
3.8
4.9
0.1
VCC
0.8
0.3
V
V
V
V
2 Submit Documentation Feedback
Copyright © 1997–2013, Texas Instruments Incorporated
Product Folder Links: DS90CF563 DS90CF564


Features DS90CF563, DS90CF564 www.ti.com SNLS10 7E – JULY 1997 – REVISED APRIL 2013 DS90CF563/DS90CF564 LVDS 18-Bit Color Flat Panel Display (FPD) Link - 65 MHz Check for Samples: DS90CF563, DS90CF56 4 FEATURES 1 •2 20 to 65 MHz Shift C lk Support • Up to 171 Mbytes/s Bandw idth • Cable Size is Reduced to Save Cost • 290 mV Swing LVDS Devices for Low EMI • Low Power CMOS Design (< 55 0 mW typ) • Power-down Mode Saves Pow er (< 0.25 mW) • PLL Requires No Exte rnal Components • Low Profile 48-Lead TSSOP Package • Falling Edge Data St robe • Compatible with TIA/EIA-644 LV DS Standard • Single Pixel Per Clock XGA (1024 x 768) • Supports VGA, SVGA , XGA and Higher • 1.3 Gbps Throughpu t DESCRIPTION The DS90CF563 transmitte r converts 21 bits of CMOS/TTL data int o three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in paral lel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitt.
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