DS90CR286A LVDS Receiver Datasheet

DS90CR286A Datasheet, PDF, Equivalent


Part Number

DS90CR286A

Description

3.3-V Rising Edge Data Strobe LVDS Receiver

Manufacture

etcTI

Total Page 30 Pages
Datasheet
Download DS90CR286A Datasheet


DS90CR286A
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
DS90CR216A, DS90CR286A, DS90CR286A-Q1
SNLS043H – MAY 2000 – REVISED JANUARY 2016
DS90CR286A/-Q1 (or DS90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver
28-Bit (or 21-Bit) Channel Link-66 MHz
1 Features
1 20 to 66 MHz Shift Clock Support
• 50% Duty Cycle on Receiver Output Clock
• Best–in–Class Set and Hold Times on Rx Outputs
• Rx Power Consumption < 270 mW (Typ) at 66
MHz Worst Case
• Rx Power-Down Mode < 200 μW (Max)
• ESD Rating > 7 kV (HBM), > 700 V (EIAJ)
• PLL Requires No External Components
• Compatible with TIA/EIA-644 LVDS Standard
• Low Profile 56-Pin or 48-Pin DGG (TSSOP)
Package
• Operating Temperature: 40°C to 85°C
• Automotive Q Grade Available - AEC-Q100 Grade
3 Qualified
2 Applications
• Video Displays
• Automotive Infotainment
• Industrial Printers and Imaging
• Digital Video Transport
• Machine Vision
3 Description
The DS90CR286A receiver converts the four LVDS
data streams back into parallel 28 bits of LVCMOS
data. Also available is the DS90CR216A receiver that
converts the three LVDS data streams back into
parallel 21 bits of LVCMOS data. The outputs of both
receivers strobe on the rising edge.
The receiver LVDS clock operates at rates from 20 to
66 MHz. The device phase-locks to the input clock,
samples the serial bit streams at the LVDS data lines,
and converts them into parallel output data. At an
incoming clock rate of 66 MHz, each LVDS input line
is running at a bit rate of 462 Mbps, resulting in a
maximum throughput of 1.848 Gbps for the
DS90CR286A and 1.386 Gbps for the DS90CR216A.
The DS90CR286A and DS90CR216A devices are
enhanced over prior generation receivers and provide
a wider data valid time on the receiver output. The
use of these serial link devices is ideal for solving
EMI and cable size problems associated with
transmitting data over wide, high speed parallel
LVCMOS interfaces. Both devices are offered in
TSSOP packages.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DS90CR286AMTD TSSOP (56)
14.00 mm x 6.10 mm
DS90CR286AQMT TSSOP (56)
14.00 mm x 6.10 mm
DS90CR216AMTD TSSOP (48)
12.50 mm × 6.10 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Block Diagram (DS90CR216A)
LVDS Cable or PCB Trace
LVDS Data
DS90CR216A 21-Bit Rx
RxOUT[20:0]
18-Bit RGB Display Unit
Graphics Processor Unit (GPU)
21-Bit Tx Data
(3 LVDS Data, 1 LVDS Clock)
LVDS Clock
RxCLK
PLL
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.

DS90CR286A
DS90CR216A, DS90CR286A, DS90CR286A-Q1
SNLS043H – MAY 2000 – REVISED JANUARY 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics........................................... 6
6.6 Switching Characteristics: Receiver ......................... 7
6.7 Typical Characteristics ............................................ 13
7 Detailed Description ............................................ 14
7.1 Overview ................................................................. 14
7.2 Functional Block Diagrams ..................................... 14
7.3 Feature Description................................................. 15
7.4 Device Functional Modes........................................ 16
8 Application and Implementation ........................ 17
8.1 Application Information............................................ 17
8.2 Typical Applications ............................................... 17
9 Power Supply Recommendations...................... 23
10 Layout................................................................... 23
10.1 Layout Guidelines ................................................. 23
10.2 Layout Examples................................................... 23
11 Device and Documentation Support ................. 25
11.1 Device Support...................................................... 25
11.2 Related Links ........................................................ 25
11.3 Community Resources.......................................... 25
11.4 Trademarks ........................................................... 25
11.5 Electrostatic Discharge Caution ............................ 25
11.6 Glossary ................................................................ 25
12 Mechanical, Packaging, and Orderable
Information ........................................................... 25
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (August 2015) to Revision H
Page
• Changed Figure 6 and Figure 7 to clarify that TxIN on Tx is the same as RxOUT on Rx .................................................... 9
• Changed "limit output amplitude" to "reduce reflections from long board traces" for clarification........................................ 18
• Deleted 0.01-µF and 0.001-µF caps from required DC power supply coupling capacitors ................................................. 18
• Deleted "Setup and Hold Time" label from the Rx strobe window diagram to clarify RSKM concept ................................. 21
• Changed direction of Rx strobe position shift for correct left and right RSKM margin shift behavior .................................. 21
• Added new Application Note reference for RSKM improvement.......................................................................................... 21
• Added improved layout guidelines........................................................................................................................................ 23
• Changed Figure 28 graphic to clarify the use of series resistors on LVCMOS output ........................................................ 24
Changes from Revision F (February 2013) to Revision G
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section .................................................................................................. 1
• Changed specification title to clarify 3.3 V LVCMOS and not standard 5 V CMOS............................................................... 6
• Changed title and graphic of figure to clarify 3.3 V LVCMOS and not standard 5 V CMOS ................................................. 8
• Changed title of DS90CR286A mapping to clarify the make-up of the LVDS lines ............................................................... 9
• Changed title of DS90CR216A mapping to clarify the make-up of the LVDS lines ............................................................... 9
• Added cycle-to-cycle jitter value of 250 ps instead of TBD ps ............................................................................................. 12
Changes from Revision E (February 2013) to Revision F
Page
• Changed layout of National Data Sheet to TI format ............................................................................................................. 3
2 Submit Documentation Feedback
Copyright © 2000–2016, Texas Instruments Incorporated
Product Folder Links: DS90CR216A DS90CR286A DS90CR286A-Q1


Features Product Folder Sample & Buy Technical Documents Tools & Software Support & Community DS90CR216A, DS90CR286A, DS90 CR286A-Q1 SNLS043H – MAY 2000 – REV ISED JANUARY 2016 DS90CR286A/-Q1 (or DS 90CR216A) 3.3-V Rising Edge Data Strobe LVDS Receiver 28-Bit (or 21-Bit) Chann el Link-66 MHz 1 Features •1 20 to 6 6 MHz Shift Clock Support • 50% Duty Cycle on Receiver Output Clock • Best –in–Class Set and Hold Times on Rx Outputs • Rx Power Consumption < 270 mW (Typ) at 66 MHz Worst Case • Rx Po wer-Down Mode < 200 μW (Max) • ESD R ating > 7 kV (HBM), > 700 V (EIAJ) • PLL Requires No External Components • Compatible with TIA/EIA-644 LVDS Stand ard • Low Profile 56-Pin or 48-Pin DG G (TSSOP) Package • Operating Tempera ture: −40°C to 85°C • Automotive Q Grade Available - AEC-Q100 Grade 3 Qu alified 2 Applications • Video Displa ys • Automotive Infotainment • Indu strial Printers and Imaging • Digital Video Transport • Machine Vision 3 Description The DS90CR286A receiver converts the four LVDS data strea.
Keywords DS90CR286A, datasheet, pdf, etcTI, 3.3-V, Rising, Edge, Data, Strobe, LVDS, Receiver, S90CR286A, 90CR286A, 0CR286A, DS90CR286, DS90CR28, DS90CR2, Equivalent, stock, pinout, distributor, price, schematic, inventory, databook, Electronic, Components, Parameters, parts, cross reference, chip, Semiconductor, circuit, Electric, manual, substitute




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)