Analog Multiplexers. DG407 Datasheet

DG407 Multiplexers. Datasheet pdf. Equivalent

DG407 Datasheet
Recommendation DG407 Datasheet
Part DG407
Description CMOS Analog Multiplexers
Feature DG407; www.vishay.com DG406, DG407 Vishay Siliconix 16-Ch/Dual 8-Ch High-Performance CMOS Analog Multiple.
Manufacture Vishay
Datasheet
Download DG407 Datasheet




Vishay DG407
www.vishay.com
DG406, DG407
Vishay Siliconix
16-Ch/Dual 8-Ch High-Performance CMOS Analog Multiplexers
DESCRIPTION
The DG406 is a 16 channel single-ended analog multiplexer
designed to connect one of sixteen inputs to a common
output as determined by a 4-bit binary address. The DG407
selects one of eight differential inputs to a common
differential output. Break-before-make switching action
protects against momentary shorting of inputs.
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up
to the power supply rails. An enable (EN) function allows the
user to reset the multiplexer/demultiplexer to all switches off
for stacking several devices. All control inputs, address (Ax)
and enable (EN) are TTL compatible over the full specified
operating temperature range.
Applications for the DG406, DG407 include high speed data
acquisition, audio signal switching and routing, ATE
systems, and avionics. High performance and low power
dissipation make them ideal for battery operated and
remote instrumentation applications.
Designed in the 44 V silicon-gate CMOS process, the
absolute maximum voltage rating is extended to 44 V,
allowing operation with ± 20 V supplies. Additionally
single (12 V) supply operation is allowed. An epitaxial layer
prevents latchup.
For applications information please request documents
70601 and 70604.
FEATURES
• Low on-resistance - RDS(on): 50
• Low charge injection - Q: 15 pC
• Fast transition time - tTRANS: 200 ns
• Low power: 0.2 mW
Available
• Single supply capability
• 44 V supply max. rating
Available
• Material categorization:
For definitions of compliance please see
www.vishay.com/doc?99912
Note
* This datasheet provides information about parts that are
RoHS-compliant and/or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information/tables in this datasheet for details.
BENEFITS
• Higher accuracy
• Reduced glitching
• Improved data throughput
• Reduced power consumption
• Increased ruggedness
• Wide supply ranges: ± 5 V to ± 20 V
APPLICATIONS
• Data acquisition systems
• Audio signal routing
• Medical instrumentation
• ATE systems
• Battery powered systems
• High-rel systems
• Single supply systems
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG406
Dual-In-Line and SOIC Wide-Body
DG407
Dual-In-Line and SOIC Wide-Body
V+
NC
NC
S16
S15
S14
S13
S12
S11
S10
S9
GND
NC
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Decoders/Drivers
28 D
27 V-
26 S8
25 S7
24 S6
23 S5
22 S4
21 S3
20 S2
19 S1
18 EN
17 A0
16 A1
15 A2
V+
Db
NC
S8b
S7b
S6b
S5b
S4b
S3b
S2b
S1b
GND
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
2
Decoders/Drivers
28 Da
27 V-
26 S8a
25 S7a
24 S6a
23 S5a
22 S4a
21 S3a
20 S2a
19 S1a
18 EN
17 A0
16 A1
15 A2
Top View
Top View
S13-2518-Rev. K, 09-Dec-13
1
Document Number: 70061
For technical questions, contact: analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay DG407
www.vishay.com
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG406
PLCC and LCC
DG407
DG406, DG407
Vishay Siliconix
PLCC and LCC
4 3 2 1 28 27 26
4 3 2 1 28 27 26
S15 5
S14 6
S13 7
S12 8
S11 9
S10 10
S9 11
Decoders/Drivers
12 13 14 15 16 17 18
25 S7
24 S6
23 S5
22 S4
21 S3
20 S2
19 S1
S7b 5
S6b 6
S5b 7
S4b 8
S3b 9
S2b 10
S1b 11
Decoders/Drivers
12 13 14 15 16 17 18
25 S7a
24 S6a
23 S5a
22 S4a
21 S3a
20 S2a
19 S1a
Top View
Top View
TRUTH TABLE (DG406)
A3 A2 A1 A0
XXXX
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
EN ON SWITCH
0 None
11
12
13
14
15
16
17
18
19
1 10
1 11
1 12
1 13
1 14
1 15
1 16
TRUTH TABLE (DG407)
A2 A1 A0
XXX
000
001
010
011
100
101
110
111
Notes
• Logic “0” = VAL 0.8 V
• Logic “1” = VAH 2.4 V
• X = Do not Care
EN ON SWITCH PAIR
0 None
11
12
13
14
15
16
17
18
ORDERING INFORMATION (DG406)
ORDERING INFORMATION (DG407)
TEMP. RANGE
PACKAGE
PART NUMBER
TEMP. RANGE
PACKAGE
PART NUMBER
-40 °C to 85 °C
28-Pin Plastic DIP
28-Pin PLCC
28-Pin Widebody SOIC
DG406DJ,
DG406DJ-E3
DG406DN,
DG406DN-T1-E3
DG406DW,
DG406DW-E3,
DG406DW-T1-E3
-40 °C to 85 °C
28-Pin Plastic DIP
28-Pin PLCC
28-Pin Widebody SOIC
DG407DJ,
DG407DJ-E3
DG407DN,
DG407DN-T1-E3
DG407DW,
DG407DW-E3,
DG407DW-T1-E3
Note
-T1 indicates Tape and Reel, -E3 indicates Lead-Free and RoHS Compliant, NO -E3 indicates standard Tin/Lead finish.
S13-2518-Rev. K, 09-Dec-13
2
Document Number: 70061
For technical questions, contact: analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000



Vishay DG407
www.vishay.com
DG406, DG407
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Voltages Referenced to V-
V+ to V -f
GND to V-
Digital Inputsa, VS, VD
Current (Any terminal)
Peak Current, S or D (Pulsed at 1 ms, 10 % duty cycle max.)
Storage Temperature
(AK, AZ Suffix)
(DJ, DN Suffix)
28-Pin Plastic DIPb
Power Dissipation (Package)b
28-Pin Plastic PLCCc
28-Pin Widebody SOIC
LIMIT
44
-25
(V-) - 2 to (V+) + 2 V
or 20 mA, whichever occurs first
30
100
-65 to 150
-65 to 125
625
450
450
UNIT
V
mA
°C
mW
Notes
a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 6 mW/°C above 75 °C.
d. Derate 12 mW/°C above 75 °C.
e. Derate 13.5 mW/°C above 75 °C.
f. Also applies when V- = GND
S13-2518-Rev. K, 09-Dec-13
3
Document Number: 70061
For technical questions, contact: analogswitchsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000







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