Mixed-Signal Microcontrollers. MSP430FG439 Datasheet

MSP430FG439 Microcontrollers. Datasheet pdf. Equivalent

Part MSP430FG439
Description Mixed-Signal Microcontrollers
Feature MSP430FG439, MSP430FG438, MSP430FG437 SLAS380D – APRIL 2004 – REVISED NOVEMBER 2014 MSP430FG43x Mixe.
Manufacture etcTI
Datasheet
Download MSP430FG439 Datasheet



MSP430FG439
MSP430FG439, MSP430FG438, MSP430FG437
SLAS380D – APRIL 2004 – REVISED NOVEMBER 2014
MSP430FG43x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
1
• Low Supply-Voltage Range, 1.8 V to 3.6 V
• Ultra-Low Power Consumption
– Active Mode: 300 µA at 1 MHz, 2.2 V
– Standby Mode: 1.1 µA
– Off Mode (RAM Retention): 0.1 µA
• Five Power-Saving Modes
• Wakeup From Standby Mode in Less Than 6 µs
• 16-Bit RISC Architecture, 125-ns Instruction Cycle
Time
• Single-Channel Internal DMA
• 12-Bit Analog-to-Digital Converter (ADC) With
Internal Reference, Sample-and-Hold and
Autoscan Feature
• Three Configurable Operational Amplifiers
• Dual 12-Bit Digital-to-Analog Converters (DACs)
With Synchronization
• 16-Bit Timer_A With Three Capture/Compare
Registers
• 16-Bit Timer_B With Three Capture/Compare-
With-Shadow Registers
• On-Chip Comparator
• Serial Communication Interface (USART),
Select Asynchronous UART or Synchronous SPI
by Software
• Brownout Detector
• Supply-Voltage Supervisor and Monitor With
Programmable Level Detection
• Bootstrap Loader (BSL)
• Serial Onboard Programming, No External
Programming Voltage Needed, Programmable
Code Protection by Security Fuse
• Integrated Liquid Crystal Display (LCD) Driver for
up to 128 Segments
• Available in 113-Ball BGA (ZCA) and 80-Pin QFP
(PN) Packages
Section 3 Summarizes the Available Family
Members
• For Complete Module Descriptions, See the
MSP430x4xx Family User's Guide (SLAU056)
1.2 Applications
• Analog and Digital Sensor Systems
• Digital Motor Control
• Remote Controls
• Thermostats
• Digital Timers
• Hand-Held Meters
1.3 Description
The Texas Instruments MSP430™ family of ultra-low-power microcontrollers consists of several devices
featuring different sets of peripherals targeted for various applications. The architecture, combined with
five low-power modes, is optimized to achieve extended battery life in portable measurement applications.
The device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute
to maximum code efficiency. The digitally controlled oscillator (DCO) allows the device to wake up from
low-power modes to active mode in less than 6 µs.
The MSP430FG43x devices are microcontrollers with two 16-bit timers, a high-performance 12-bit ADC,
dual 12-bit DACs, three configurable operational amplifiers, one universal synchronous/asynchronous
communication interface, DMA, 48 I/O pins, and an LCD driver.
Table 1-1. Device Information(1)
PART NUMBER
MSP430FG439PN
MSP430FG439ZCA
PACKAGE
LQFP (80)
BGA (113)
BODY SIZE(2)
12 mm x 12 mm
7 mm x 7 mm
(1) For the most current device, package, and ordering information, see the Package Option Addendum in Section 8, or see the TI web site
at www.ti.com.
(2) The sizes shown here are approximations. For the package dimensions with tolerances, see the Mechanical Data in Section 8.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



MSP430FG439
MSP430FG439, MSP430FG438, MSP430FG437
SLAS380D – APRIL 2004 – REVISED NOVEMBER 2014
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram.
XIN XOUT
DVCC1/2 DVSS1/2 AVCC AVSS
P1
8
P2
8
P3
8
XT2IN
XT2OUT
Oscillator
FLL+
MCLK
ACLK
SMCLK
Flash
60KB
48KB
32KB
8 MHz
CPU
incl. 16
Registers
MAB
MDB
RAM
2KB
1KB
ADC12
12-Biit
12 Channels
<10µs Conv.
DAC12
12-Bit
2 Channels
Voltage Out
Port 1
8 I/O
Interrupt
Capability
Port 2
8 I/O
Interrupt
Capability
Port 3
8 I/O
P4
8
Port 4
8 I/O
www.ti.com
P5
8
P6
8
Port 5
8 I/O
Port 6
8 I/O
Emulation
Module
JTAG
Interface
POR/
SVS/
Brownout
DMA
Controller
1 Channel
Watchdog
Timer
WDT
15/16-Bit
Timer_B3
3 CC Reg
Shadow
Reg
Timer_A3
3 CC Reg
Comparator_
A
Basic
Timer 1
1 Interrupt
Vector
LCD
128
Segments
1,2,3,4 MUX
USART0
UART Mode
SPI Mode
OA0, OA1
OA2
3 Op Amps
fLCD
RST/NMI
Figure 1-1. Functional Block Diagram
2 Device Overview
Copyright © 2004–2014, Texas Instruments Incorporated
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