Mixed-Signal Microcontrollers. MSP430F123 Datasheet

MSP430F123 Microcontrollers. Datasheet pdf. Equivalent

MSP430F123 Datasheet
Recommendation MSP430F123 Datasheet
Part MSP430F123
Description Mixed-Signal Microcontrollers
Feature MSP430F123; MSP430x12x MIXED SIGNAL MICROCONTROLLER D Low Supply Voltage Range 1.8 V to 3.6 V D Ultralow-Power .
Manufacture etcTI
Datasheet
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Texas Instruments MSP430F123
MSP430x12x
MIXED SIGNAL MICROCONTROLLER
D Low Supply Voltage Range 1.8 V to 3.6 V
D Ultralow-Power Consumption:
− Active Mode: 200 μA at 1 MHz, 2.2 V
− Standby Mode: 0.7 μA
− Off Mode (RAM Retention): 0.1 μA
D Five Power Saving Modes
D Wake-Up From Standby Mode in less
than 6 μs
D 16-Bit RISC Architecture, 125 ns
Instruction Cycle Time
D Basic Clock Module Configurations:
− Various Internal Resistors
− Single External Resistor
− 32 kHz Crystal
− High Frequency Crystal
− Resonator
− External Clock Source
D 16-Bit Timer_A With Three
Capture/Compare Registers
D On-Chip Comparator for Analog Signal
Compare Function or Slope A/D
Conversion
SLAS312C − JULY 2001 − REVISED SEPTEMBER 2004
D Serial Communication Interface (USART0)
Software-Selects Asynchronous UART or
Synchronous SPI
D Serial Onboard Programming,
No External Programming Voltage Needed
Programmable Code Protection by Security
Fuse
D Family Members Include:
MSP430F122: 4KB + 256B Flash Memory
256B RAM
MSP430F123: 8KB + 256B Flash Memory
256B RAM
D Available in a 28-Pin Plastic Small-Outline
Wide Body (SOWB) Package, 28-Pin Plastic
Thin Shrink Small-Outline Package
(TSSOP) and 32-Pin QFN Package
D For Complete Module Descriptions, See the
MSP430x1xx Family User’s Guide,
Literature Number SLAU049
description
The Texas Instruments MSP430 family of ultralow power microcontrollers consist of several devices featuring
different sets of peripherals targeted for various applications. The architecture, combined with five low power
modes is optimized to achieve extended battery life in portable measurement applications. The device features
a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that attribute to maximum code efficiency.
The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in less than 6μs.
The MSP430F12x series is an ultralow-power mixed signal microcontroller with a built-in 16-bit timer and
twenty-two I/O pins. The MSP430F12x series also has a built-in communication capability using asynchronous
(UART) and synchronous (SPI) protocols in addition to a versatile analog comparator.
Typical applications include sensor systems that capture analog signals, convert them to digital values, and then
process the data and display them or transmit them to a host system. Stand alone RF sensor front end is another
area of application. The I/O port inputs provide single slope A/D conversion capability on resistive sensors.
TA
−40°C to 85°C
AVAILABLE OPTIONS
PACKAGED DEVICES
PLASTIC 28-PIN SOWB PLASTIC 28-PIN TSSOP
(DW)
(PW)
MSP430F122IDW
MSP430F123IDW
MSP430F122IPW
MSP430F123IPW
PLASTIC 32-PIN QFN
(RHB)
MSP430F122IRHB
MSP430F123IRHB
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2001 − 2004 Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1



Texas Instruments MSP430F123
MSP430x12x
MIXED SIGNAL MICROCONTROLLER
SLAS312C − JULY 2001 − REVISED SEPTEMBER 2004
pin designation, MSP430x12x
DW OR PW PACKAGE
(TOP VIEW)
TEST
VCC
P2.5/ROSC
VSS
XOUT
XIN
RST/NMI
P2.0/ACLK
P2.1/INCLK
P2.2/CAOUT/TA0
P3.0/STE0
P3.1/SIMO0
P3.2/SOMI0
P3.3/UCLK0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
RHB PACKAGE
(TOP VIEW)
P1.7/TA2/TDO/TDI
P1.6/TA1/TDI/TCLK
P1.5/TA0/TMS
P1.4/SMCLK/TCK
P1.3/TA2
P1.2/TA1
P1.1/TA0
P1.0/TACLK
P2.4/CA1/TA2
P2.3/CA0/TA1
P3.7
VSS
XOUT
XIN
P3.6
P3.5/URXD0
P3.4/UTXD0
NC
RST/NMI
P2.0/ACLK
P2.1/INCLK
P2.2/CAOUT/TA0
1 31 30 29 28 27 26 24
2 23
3 22
4 21
5 20
6 19
7 18
8 10 11 12 13 14 15 17
P1.3/TA2
P1.2/TA1
P1.1/TA0
P1.0/TACLK
NC
P2.4/CA1/TA2
P2.3/CA0/TA1
NC
functional block diagram
XIN XOUT
VCC
VSS
ROSC
Oscillator
System
Clock
ACLK 8KB Flash
SMCLK 4KB Flash
256B RAM
MCLK
CPU
Incl. 16 Reg.
Test MAB,M1A6BB,it16-Bit
JTAG
MDBM, D1B6 ,B1it6-Bit
TEST
Watchdog
Timer
15/16-Bit
Timer_A3
3 CC Reg
Note: NC pins not internally connected
Power Pad connection to VSS recommended
RST/NMI
P1 P2 P3
JTAG
86
I/O Port 1
8 I/Os, with
Interrupt
Capability
I/O Port 2
6 I/Os, with
Interrupt
Capability
8
I/O Port 3
8 I/Os
MAB,
4 Bit
MCB
Bus
Conv
MDB, 8 Bit
POR
Comparator
A
USART0
UART Mode
SPI Mode
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Texas Instruments MSP430F123
MSP430x12x
MIXED SIGNAL MICROCONTROLLER
SLAS312C − JULY 2001 − REVISED SEPTEMBER 2004
Terminal Functions
NAME
P1.0/TACLK
P1.1/TA0
TERMINAL
DW, PW
NO.
21
22
RHB
NO.
21
22
I/O
I/O
I/O
P1.2/TA1
P1.3/TA2
P1.4/SMCLK/TCK
23
24
25
23 I/O
24 I/O
25 I/O
P1.5/TA0/TMS
26 26 I/O
P1.6/TA1/TDI/TCLK
27
27 I/O
P1.7/TA2/TDO/TDI
28
28 I/O
P2.0/ACLK
P2.1/INCLK
P2.2/CAOUT/TA0
8
9
10
6 I/O
7 I/O
8 I/O
P2.3/CA0/TA1
P2.4/CA1/TA2
P2.5/ROSC
P3.0/STE0
P3.1/SIMO0
P3.2/SOMI0
P3.3/UCLK0
19 18 I/O
20 19 I/O
3 32 I/O
11 9 I/O
12 10 I/O
13 11 I/O
14 12 I/O
P3.4/UTXD0
15 13 I/O
P3.5/URXD0
16 14 I/O
P3.6
17 15 I/O
P3.7
18 16 I/O
RST/NMI
7 5I
TEST
1 29 I
VCC 2 30
VSS 4 1
XIN 6 3 I
XOUT
5 2O
NC 4, 17,
20, 31
QFN Pad
NA Package NA
Pad
TDO or TDI is selected via JTAG instruction.
DESCRIPTION
General-purpose digital I/O pin/Timer_A, clock signal TACLK input
General-purpose digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0 output/BSL
transmit
General-purpose digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1 output
General-purpose digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2 output
General-purpose digital I/O pin/SMCLK signal output/test clock, input terminal for device
programming and test
General-purpose digital I/O pin/Timer_A, compare: Out0 output/test mode select, input
terminal for device programming and test
General-purpose digital I/O pin/Timer_A, compare: Out1 output/test data input terminal or
test clock input
General-purpose digital I/O pin/Timer_A, compare: Out2 output/test data output terminal or
data input during programming
General-purpose digital I/O pin/ACLK output
General-purpose digital I/O pin/Timer_A, clock signal at INCLK
General-purpose digital I/O pin/Timer_A, capture: CCI0B input/comparator_A, output/BSL
receive
General-purpose digital I/O pin/Timer_A, compare: Out1 output/comparator_A, input
General-purpose digital I/O pin/Timer_A, compare: Out2 output/comparator_A, input
General-purpose digital I/O pin/Input for external resistor that defines the DCO nominal
frequency
General-purpose digital I/O pin/slave transmit enable—USART0/SPI mode
General-purpose digital I/O pin/slave in/master out of USART0/SPI mode
General-purpose digital I/O pin/slave out/master in of USART0/SPI mode
General-purpose digital I/O pin/external clock input—USART0/UART or SPI mode, clock
output—USART0/SPI mode clock input
General-purpose digital I/O pin/transmit data out—USART0/UART mode
General-purpose digital I/O pin/receive data in—USART0/UART mode
General-purpose digital I/O pin
General-purpose digital I/O pin
Reset or nonmaskable interrupt input
Selects test mode for JTAG pins on Port1
Supply voltage
Ground reference
Input terminal of crystal oscillator
Output terminal of crystal oscillator
No internal connection
QFN package pad connection to VSS recommended.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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