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AM5716 Datasheet
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Part AM5716
Description microprocessor
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Texas Instruments AM5716
Product
Folder
Order
Now
Technical
Documents
Tools &
Software
Support &
Community
AM5718, AM5716
SPRS957I – MARCH 2016 – REVISED NOVEMBER 2019
AM571x Sitara™ Processors
Silicon Revision 2.0 and 2.1
1 Device Overview
1.1 Features
1
• Arm® Cortex®-A15 microprocessor subsystem
• C66x floating-point VLIW DSP cores
– Fully object-code compatible with C67x and
C64x+
– Up to thirty-two 16 × 16-bit fixed-point multiplies
per cycle
• Up to 512KB of on-chip L3 RAM
• Level 3 (L3) and level 4 (L4) interconnects
• DDR3/DDR3L External Memory Interface (EMIF)
module
– Supports up to DDR3-1333 (667 MHz)
– Up to 2GB across single chip select
• 2x Dual Arm® Cortex®-M4 coprocessors (IPU1 and
IPU2)
• IVA-HD subsystem
– 4K @ 15fps encode and decode support for
H.264 CODEC
– Other CODECs are up to 1080p60
• Display subsystem
– Full-HD video (1920 × 1080p, 60 fps)
– Multiple video inputs and video outputs
– 2D and 3D graphics
– Display controller with DMA engine and up to
three pipelines
– HDMI™ encoder: HDMI 1.4a and DVI 1.0
compliant
• 2x dual-core Programmable Real-Time Unit and
Industrial Communication Subsystem (PRU-ICSS)
• Accelerator (BB2D) subsystem
– Vivante® GC320 core
• Video Processing Engine (VPE)
• Available single-core PowerVR® SGX544 3D GPU
• Secure boot support
– Hardware-enforced root-of-trust
– Customer programmable keys (SR 2.1)
– Support for takeover protection, IP protection,
and anti-roll back protection
• Cryptographic acceleration support
– Supports cryptographic cores
– AES – 128/192/256-bits key sizes
– 3DES – 56/112/168-bits key sizes
– MD5, SHA1
– SHA2 – 224/256/384/512
– True random number generator
1
– DMA support
• Debug security
– Secure software controlled debug access
– Security aware debugging
• Trusted Execution Environment (TEE) support
– Arm® TrustZone® based TEE
– Extensive firewall support for isolation
– Secure DMA path and interconnect
– Secure Watchdog/Timer/IPC
• One Video Input Port (VIP) module
– Support for up to four multiplexed input ports
• General-Purpose Memory Controller (GPMC)
• Enhanced Direct Memory Access (EDMA)
controller
• 2-Port Gigabit Ethernet switch
• Sixteen 32-bit general-purpose timers
• 32-bit MPU watchdog timer
• Five high speed Inter-Integrated Circuit ( I2C™)
ports
• HDQ/ 1-Wire® interface
• Ten configurable UART/IrDA/CIR modules
• Four Multichannel Serial Peripheral Interfaces
(McSPI)
• Quad Serial Peripheral Interface (QSPI)
• SATA Gen2 interface
• Eight Multichannel Audio Serial Port (McASP)
modules
• SuperSpeed USB 3.0 dual-role device
• High Speed USB 2.0 dual-role device
• Four MultiMedia Card/ Secure Digital®/Secure
Digital Input Output interfaces ( MMC™/
SD®/SDIO)
• PCI-Express® ( PCIe®) revision 3.0 subsystems
with two 5-Gbps lanes
– One 2-lane Gen2-compliant port
– or Two 1-lane Gen2-compliant ports
• Dual Controller Area Network (DCAN) modules
– CAN 2.0B protocol
• MIPI® Camera Serial Interface 2 (CSI-2)
• Up to 215 General-Purpose I/O (GPIO) pins
• Power, reset, and clock management
• On-chip debug with CTools technology
• 28-nm CMOS technology
• 23 mm × 23 mm, 0.8-mm pitch, 760-pin BGA
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



Texas Instruments AM5716
AM5718, AM5716
SPRS957I – MARCH 2016 – REVISED NOVEMBER 2019
www.ti.com
1.2 Applications
• Industrial communication
• Human Machine Interface (HMI)
• Automation and control
• High performance applications
• Other general use
1.3 Description
AM571x Sitara™ processors are Arm® applications processors built to meet the intense processing needs
of modern embedded products.
AM571x devices bring high processing performance through the maximum flexibility of a fully integrated
mixed processor solution. The devices also combine programmable video processing with a highly
integrated peripheral set.
Programmability is provided by a single-core Arm® Cortex®-A15 RISC CPU with Arm® Neon™ extensions
and a TI C66x VLIW floating-point DSP core. The Arm® processor lets developers keep control functions
separate from vision algorithms programmed on the DSP and coprocessors, thus reducing the complexity
of the system software.
Additionally, TI provides a complete set of development tools for the Arm® and C66x DSP, including C
compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface
for visibility into source code execution.
Cryptographic acceleration is available in all devices. All other supported security features, including
support for secure boot, debug security and support for trusted execution environment is available on
High-Security (HS) devices. For more information about HS devices, contact your TI representative.
The AM571x Sitara Arm processor family is qualified according to the AEC-Q100 Standard.
PART NUMBER
Device Information(1)
PACKAGE
AM5718ABC
FCBGA (760)
AM5716ABC
FCBGA (760)
(1) For more information, see Section 10, Mechanical, Packaging, and Orderable Information.
BODY SIZE
23.0 mm × 23.0 mm
23.0 mm × 23.0 mm
2 Device Overview
Copyright © 2016–2019, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: AM5718 AM5716



Texas Instruments AM5716
www.ti.com
AM5718, AM5716
SPRS957I – MARCH 2016 – REVISED NOVEMBER 2019
1.4 Functional Block Diagram
Figure 1-1 is functional block diagram for the device.
AM571x
MPU
(1x Arm
Cortex–A15)
IVA HD
1080p Video
Coprocessor
GPU
(1x SGX544 3D)
BB2D
(GC320 2D)
Display Subsystem
1x GFX Pipeline
3x Video Pipeline
Blend / Scale
LCD1
LCD2
LCD3
HDMI 1.4a
DSP
(1x C66x
Coprocessor)
IPU1
(Dual Cortex–M4)
IPU2
(Dual Cortex–M4)
CAL CSI2 x2
Secure Boot Debug
SecurityTEE (HS devices)
EDMA
SDMA
MMU x2
VIP
VPE
High Speed Interconnect
Spinlock
Mailbox x13
GPIO x8
System
Timers x16
WDT
RTC SS
PWM SS x3
HDQ
KBD
Connectivity
USB 3.0
Dual Role FS/HS/SS
w/ PHYs
USB 2.0
Dual Role FS/HS
w/ PHY
PCIe SS x2
PRU-ICCS x2
GMAC_SW
Serial Interfaces
UART x10
QSPI
McSPI x4 McASP x8
DCAN x2
I2C x5
Program/Data Storage
MMC / SD x4
512-KB
OCMC_RAM
w/ ECC
SATA
GPMC / ELM
(NAND/NOR/
Async)
DMM
EMIF 32-bit
DDR3(L)
Figure 1-1. AM571x Block Diagram
intro-001
Copyright © 2016–2019, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: AM5718 AM5716
Device Overview
3







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