BUS EEPROM. BR24G256-3 Datasheet

BR24G256-3 EEPROM. Datasheet pdf. Equivalent

BR24G256-3 Datasheet
Recommendation BR24G256-3 Datasheet
Part BR24G256-3
Description I2C BUS EEPROM
Feature BR24G256-3; Datasheet Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire) BR24G256-3 General Descript.
Manufacture ROHM
Datasheet
Download BR24G256-3 Datasheet




ROHM BR24G256-3
Datasheet
Serial EEPROM Series Standard EEPROM
I2C BUS EEPROM (2-Wire)
BR24G256-3
General Description
BR24G256-3 is a 256Kbit serial EEPROM of I2C BUS Interface Method
Features
Packages W(Typ) x D(Typ) x H(Max)
Completely conforming to the world standard I2C
BUS.
All controls available by 2 ports of serial clock
(SCL) and serial data (SDA)
Other devices than EEPROM can be connected to
the same port, saving microcontroller port
1.6V to 5.5V Single Power Source Operation most
suitable for battery use
1.6V to 5.5V wide limit of operating voltage, possible
FAST MODE 400kHz operation
Up to 64 Byte in Page Write Mode
Bit Format 32K x 8
Self-timed Programming Cycle
Low Current Consumption
Prevention of Write Mistake
Write (Write Protect) Function added
Prevention of Write Mistake at Low Voltage
More than 1 million write cycles
More than 40 years data retention
Noise filter built in SCL / SDA terminal
Initial delivery state FFh
Not Recommended for
New Designs
DIP-T8
9.30mm x 6.50mm x 7.10mm
SSOP-B8
3.00mm x 6.40mm x 1.35mm
SOP8
5.00mm x 6.20mm x 1.71mm
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
SOP- J8M
4.90mm x 6.00mm x 1.80mm
TSSOP-B8M
3.00mm x 6.40mm x 1.10mm
SOP- J8
4.90mm x 6.00mm x 1.65mm
Figure 1.
Product structure : Silicon monolithic integrated circuit This product has no designed protection against radioactive rays
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©2013 ROHM Co., Ltd. All rights reserved.
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ROHM BR24G256-3
BR24G256-3
Datasheet
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Rating
Supply Voltage
Vcc
Power Dissipation
Pd
Storage Temperature
Tstg
Operating Temperature Topr
-0.3 to +6.5
0.45 (SOP8)
0.45 (SOP-J8M)
0.45 (SOP-J8)
0.30 (SSOP-B8)
0.33 (TSSOP-B8)
0.33 (TSSOP-B8M)
0.80 (DIP-T8(1))
-65 to +150
-40 to +85
Input Voltage /
Output Voltage
-
Junction
Temperature
Tjmax
Electrostatic discharge
voltage
VESD
(human body model)
(1) Not Recommended for New Designs.
-0.3 to Vcc+1.0
150
-4000 to +4000
Unit
V
W
°C
°C
V
°C
Remark
Derate by 4.5mW/°C when operating above Ta=25°C
Derate by 4.5mW/°C when operating above Ta=25°C
Derate by 4.5mW/°C when operating above Ta=25°C
Derate by 3.0mW/°C when operating above Ta=25°C
Derate by 3.3mW/°C when operating above Ta=25°C
Derate by 3.3mW/°C when operating above Ta=25°C
Derate by 8.0mW/°C when operating above Ta=25°C
The Max value of input voltage/output voltage is not over 6.5V.
When the pulse width is 50ns or less, the Min value of input
voltage/output voltage is not lower than -1.0V.
Junction temperature at the storage condition
V
Memory Cell Characteristics (Ta=25°C , Vcc=1.6V to 5.5V)
Parameter
Limit
Min Typ Max
Write Cycles (2)
1,000,000 -
-
Data Retention (2)
40 - -
(2) Not 100% TESTED
Unit
Times
Years
Recommended Operating Ratings
Parameter
Symbol
Power Source Voltage
Vcc
Input Voltage
VIN
Rating
1.6 to 5.5
0 to Vcc
Unit
V
DC Characteristics (Unless otherwise specified, Ta=-40°C to +85°C , VCC=1.6V to 5.5V)
Parameter
Symbol
Min
Limit
Typ
Max
Unit
Conditions
Input High Voltage1
Input Low Voltage1
Input High Voltage2
Input Low Voltage2
Output Low Voltage1
Output Low Voltage2
VIH1
VIL1
VIH2
VIL2
VOL1
VOL2
0.7Vcc
-0.3(3)
0.8Vcc
-0.3(3)
-
-
- Vcc+1.0 V 1.7VVCC5.5V
- +0.3VCC V 1.7VVCC5.5V
- Vcc+1.0 V 1.6VVCC<1.7V
- +0.2Vcc V 1.6VVCC<1.7V
- 0.4 V IOL=3.0mA, 2.5VVCC5.5V (SDA)
- 0.2 V IOL=0.7mA, 1.6VVCC<2.5V (SDA)
Input Leakage Current
ILI -1 - +1 µA VIN=0 to Vcc
Output Leakage Current
Supply Current (Write)
ILO
ICC1
-1
-
Supply Current (Read)
ICC2
-
Standby Current
ISB -
(3) When the pulse width is 50ns or less, it is -1.0V.
- +1 µA VOUT=0 to Vcc (SDA)
-
2.5
mA
VCC=5.5V, fSCL=400kHz, tWR=5ms,
Byte write, page write
-
0.5
mA
Vcc=5.5V, fSCL=400kHz
Random read, current read, sequential read
-
2.0
µA
VCC=5.5V, SDA, SCL=Vcc
A0, A1, A2=GND, WP=GND
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ROHM BR24G256-3
BR24G256-3
AC Characteristics (Unless otherwise specified, Ta=-40°C to +85°C, VCC=1.6V to 5.5V)
Parameter
Limit
Symbol
Min Typ Max
Clock Frequency
fSCL - - 400
Data Clock High Period
tHIGH
0.6
-
-
Data Clock Low Period
tLOW 1.2 -
-
SDA, SCL (INPUT) Rise Time (1)
tR - - 1.0
SDA, SCL (INPUT) Fall Time (1)
tF1 - - 1.0
SDA (OUTPUT) Fall Time (1)
tF2 - - 0.3
Start Condition Hold Time
tHD:STA
0.6
-
-
Start Condition Setup Time
tSU:STA
0.6
-
-
Input Data Hold Time
tHD:DAT
0
-
-
Input Data Setup Time
tSU:DAT
100
-
-
Output Data Delay Time
tPD 0.1 - 0.9
Output Data Hold Time
tDH 0.1 -
-
Stop Condition Setup Time
tSU:STO
0.6
-
-
Bus Free Time
tBUF 1.2 -
-
Write Cycle Time
tWR - - 5
Noise Spike Width (SDA and SCL)
tI - - 0.1
WP Hold Time
tHD:WP
1.0
-
-
WP Setup Time
tSU:WP
0.1
-
-
WP High Period
(1) Not 100% TESTED.
Condition Input data level: VIL=0.2×VCC VIH=0.8×VCC
Input data timing reference level: 0.3×VCC/0.7×VCC
Output data timing reference level: 0.3×VCC/0.7×VCC
Rise/Fall time : 20ns
tHIGH:WP
1.0
-
-
Datasheet
Unit
kHz
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
ms
µs
µs
µs
µs
Serial Input / Output Timing
tR tF1 tHIGH
SCL
70%
SDA
((INPU) T)
tHD:STA
70%
tBUF
30%
70%
70% 70%
30%
30%
tSU:DAT
tLOW
70%
tPD
70%
30%
70%
30%
tHD:DAT
70%
30%
tDH
SDA
((OUT)PUT)
70%
30%
30%
Input read at the rise edge of SCL
S(oDuAtput)Data
output
in
sync
with
the
70%
fall30o% f
SCL
70%
30%
70%
30%
tF2
Figure 2-(a). Serial Input / Output Timing
70%
DATA(1)
D1 D0 ACK
DATA(n)
ACK
70%
tWR
30%
30%
ttSSUU::WWPP
tHD:WPP
SSTTOOPP CCOONNDDIITTIIOONN
Figure 2-(d). WP Timing at Write Execution
70% 70%
70%
tSU:STA
tHD:STA
70%
30%
START CONDITION
tSU:STO
30%
STOP CONDITION
30% 30%
FigureST2AR-T(CbON)D.ITISONtart-Stop Bit TimingSTOP CONDITION
DDAATTAA((11))
DDAATTAA((nn))
DD11 DD00 AACCKK
ttHHIIGGHH::WWPP
Fig1-(4) Write7700c%%ycle tim77i00n%%g
AACCKK
7700%%
ttWWRR
Fig1-(5) WP timing at write execution
FFigig1-u(r6e) 2W-P(et)im. WingPatTwimritiencgaancteWl rite Cancel
D0
write data
(n-th address)
ACK
70% 70%
tWR
STOP CONDITION START CONDITION
Figure 2-(c). Write Cycle Timing
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©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111 15 001
Fig1-(5) WP timing at write execution
Fig1-(6) WP timing at write cancel
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TSZ02201-0R2R0G100240-1-2
11.Jun.2019 Rev.007







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