BINARY COUNTERS. CY54FCT163T Datasheet

CY54FCT163T COUNTERS. Datasheet pdf. Equivalent

Part CY54FCT163T
Description 4-BIT BINARY COUNTERS
Feature CY54FCT163T, CY74FCT163T 4-BIT BINARY COUNTERS D Function, Pinout, and Drive Compatible With FCT an.
Manufacture etcTI
Total Page 12 Pages
Datasheet
Download CY54FCT163T Datasheet



CY54FCT163T
CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
D Function, Pinout, and Drive Compatible
With FCT and F Logic
D Reduced VOH (Typically = 3.3 V) Versions of
Equivalent FCT Functions
D Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D Ioff Supports Partial-Power-Down Mode
Operation
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D Matched Rise and Fall Times
D Fully Compatible With TTL Input and
Output Logic Levels
D CY54FCT163T
– 32-mA Output Sink Current
– 12-mA Output Source Current
D CY74FCT163T
– 64-mA Output Sink Current
– 32-mA Output Source Current
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
CY74FCT163CT . . . Q OR SO PACKAGE
(TOP VIEW)
SR
CP
P0
P1
P2
P3
CEP
GND
1
2
3
4
5
6
7
8
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 CET
9 PE
CY54FCT163T . . . L PACKAGE
(TOP VIEW)
3 2 1 20 19
P0 4
18 Q0
P1 5
17 Q1
NC 6
16 NC
P2 7
15 Q2
P3 8
14 Q3
9 10 11 12 13
description
The ’FCT163T devices are high-speed
NC – No internal connection
synchronous modulo-16 binary counters. They
are synchronously presettable for application in
programmable dividers. These devices have two
types of count-enable (CEP and CET) inputs, plus a terminal-count (TC) output for versatility in forming
synchronous multistaged counters. The ’FCT163T devices have a synchronous-reset (SR) input that overrides
counting and parallel loading, and allows the outputs to be reset simultaneously on the rising edge of the clock.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
NAME
CEP
CET
CP
SR
P
PE
Q
TC
PIN DESCRIPTION
DESCRIPTION
Count-enable parallel input
Count-enable trickle input
Clock pulse input (active rising edge)
Synchronous-reset input (active low)
Parallel data inputs
Parallel-enable input (active low)
Flip-flop outputs
Terminal-count output
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1



CY54FCT163T
CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A MAY 1994 REVISED OCTOBER 2001
ORDERING INFORMATION
TA
PACKAGE
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP Q Tape and reel
5.8
CY74FCT163CTQCT FT163-3
40°C to 85°C
SOIC SO
Tube
Tape and reel
5.8
5.8
CY74FCT163CTSOC
CY74FCT163CTSOCT
FCT163C
55°C to 125°C LCC L
Tube
11.5 CY54FCT163TLMB
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
ACTION ON
THE RISING
SR PE CET CEP CLOCK EDGE(S)
LXXX
Reset (clear)
H L X X Load (Pn Qn)
H H H H Count (incremental)
H H L X No change (hold)
H H X L No change (hold)
H = High logic level, L = Low logic level, X = Dont care
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265





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