Analog-to-Digital Converter. ADS42LB49 Datasheet

ADS42LB49 Converter. Datasheet pdf. Equivalent

Part ADS42LB49
Description Analog-to-Digital Converter
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ADS42LB49
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ADS42LB49, ADS42LB69
SLAS904F – OCTOBER 2012 – REVISED MAY 2016
ADS42LBx9 14- and 16-Bit, 250-MSPS, Analog-to-Digital Converters
1 Features
1 Dual Channel
• 14- and 16-Bit Resolution
• Maximum Clock Rate: 250 MSPS
• Analog Input Buffer with High Impedance Input
• Flexible Input Clock Buffer with
Divide-by-1, -2, and -4
• 2-VPP and 2.5-VPP Differential Full-Scale Input
(SPI-Programmable)
• DDR or QDR LVDS Interface
• 64-Pin VQFN Package (9-mm × 9-mm)
• Power Dissipation: 820 mW/ch
• Aperture Jitter: 85 fS
• Internal Dither
• Channel Isolation: 100 dB
• Performance at fIN = 170 MHz at 2 VPP, –1 dBFS
– SNR: 73.2 dBFS
– SFDR:
– 87 dBc (HD2 and HD3)
– 100 dBc (Non HD2 and HD3)
• Performance at fIN = 170 MHz:
2.5 VPP, –1 dBFS
– SNR: 74.9 dBFS
– SFDR:
– 85 dBc (HD2 and HD3)
– 97 dBc (Non HD2 and HD3)
INAP,
INAM
CLKINP,
CLKINM
SYNCINP,
SYNCINM
INBP,
INBM
VCM
Simplified Schematic
ADS42LB49, ADS42LB69
14-, 16-Bit
ADC
Digital
Block
Digital Gain
and Test
Patterns
Divide
by 1,2,4
Output
Formatter
QDR
LVDS
Delay
Common
Mode
14-, 16-Bit
ADC
Digital
Block
Digital Gain
and Test
Patterns
Configuration
Registers
Output
Formatter
QDR
LVDS
OVRA
DAFRAMEP,
AFRAMEM
DACLKP,
DACLKM
DA[3:0]P,
DA[3:0]M
DB[3:0]P,
B[3:0]MM
DBCLKP,
BCLKM
DBFRAMEP,
BFRAMEM
OVRB
2 Applications
• Communication and Cable Infrastructure
• Multi-Carrier, Multimode Cellular Receivers
• Radar and Smart Antenna Arrays
• Broadband Wireless
• Test and Measurement Systems
• Software-Defined and Diversity Radios
• Microwave and Dual-Channel I/Q Receivers
• Repeaters
• Power Amplifier Linearization
3 Description
The ADS42LB49 and ADS42LB69 are a family of
high-linearity, dual-channel, 14- and 16-bit,
250-MSPS, analog-to-digital converters (ADCs)
supporting DDR and QDR LVDS output interfaces.
The buffered analog input provides uniform input
impedance across a wide frequency range while
minimizing sample-and-hold glitch energy. A
sampling clock divider allows more flexibility for
system clock architecture design. The ADS42LBx9
provides excellent spurious-free dynamic range
(SFDR) over a large input frequency range with low-
power consumption.
Device Information(1)
PART NUMBER PACKAGE
INTERFACE OPTION
ADS42LB49
VQFN (64)
14-bit DDR or QDR LVDS
14-bit JESD204B
ADS42LB69
VQFN (64)
16-bit DDR or QDR LVDS
16-bit JESD204B
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
space
space
FFT for 170MHz Input Signal
0
Fs = 250Msps
Fin = 170MHz
-20 Ain = -1dBFS
HD2 = 90dBc
HD3 = 89dBc
-40 Non HD2,3 = 100dBc
-60
-80
-100
Copyright © 2016, Texas Instruments Incorporated
-120
0
25 50 75 100 125
Frequency (MHz)
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



ADS42LB49
ADS42LB49, ADS42LB69
SLAS904F – OCTOBER 2012 – REVISED MAY 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 4
6 Specifications......................................................... 9
6.1 Absolute Maximum Ratings ...................................... 9
6.2 ESD Ratings.............................................................. 9
6.3 Recommended Operating Conditions..................... 10
6.4 Thermal Information ................................................ 10
6.5 Electrical Characteristics: ADS42LB69 (16-Bit) ...... 11
6.6 Electrical Characteristics: ADS42LB49 (14-Bit) ...... 12
6.7 Electrical Characteristics: General .......................... 13
6.8 Digital Characteristics ............................................. 14
6.9 Timing Requirements: General ............................... 15
6.10 Timing Requirements: DDR LVDS Mode.............. 15
6.11 Timing Requirements: QDR LVDS Mode ............ 16
6.12 Typical Characteristics: ADS42LB69 .................... 17
6.13 Typical Characteristics: ADS42LB49 .................... 22
6.14 Typical Characteristics: Common ......................... 27
6.15 Typical Characteristics: Contour ........................... 28
7 Parameter Measurement Information ................ 31
8 Detailed Description ............................................ 34
8.1 Overview ................................................................. 34
8.2 Functional Block Diagrams ..................................... 34
8.3 Feature Description................................................. 35
8.4 Device Functional Modes........................................ 40
8.5 Programming........................................................... 43
8.6 Register Maps ......................................................... 47
9 Application and Implementation ........................ 60
9.1 Application Information............................................ 60
9.2 Typical Application .................................................. 60
10 Power Supply Recommendations ..................... 67
11 Layout................................................................... 67
11.1 Layout Guidelines ................................................. 67
11.2 Layout Example .................................................... 68
12 Device and Documentation Support ................. 70
12.1 Related Links ........................................................ 70
12.2 Community Resources.......................................... 70
12.3 Trademarks ........................................................... 70
12.4 Electrostatic Discharge Caution ............................ 70
12.5 Glossary ................................................................ 70
13 Mechanical, Packaging, and Orderable
Information ........................................................... 70
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (December 2014) to Revision F
Page
• Added Using the ADS42LBx9 In Time-Domain, Low-Frequency Pulse Applications section.............................................. 63
• Added Community Resources section ................................................................................................................................ 70
Changes from Revision D (September 2013) to Revision E
Page
• Added ESD Ratings table and Feature Description, Device Functional Modes, Application and
Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical,
Packaging, and Orderable Information sections..................................................................................................................... 1
• Deleted Ordering Information section..................................................................................................................................... 4
• Merged all Pin Functions tables into one table ...................................................................................................................... 7
• Changed INAP, INAM pin numbers for ADS42LB69 and ADS42LB49 DDR LVDS in pin assignments table ...................... 7
• Added footnote to Table 1 ................................................................................................................................................... 15
• Added footnote to Table 2 ................................................................................................................................................... 16
• Changed pin 34 to pin 37 in Figure 79 ................................................................................................................................ 36
Changes from Revision C (September 2013) to Revision D
Page
• Changed device status to Production Data ............................................................................................................................ 1
• Added pre-RTM changes throughout document .................................................................................................................... 1
2 Submit Documentation Feedback
Copyright © 2012–2016, Texas Instruments Incorporated
Product Folder Links: ADS42LB49 ADS42LB69





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