Gate Driver. LM5110 Datasheet

LM5110 Driver. Datasheet pdf. Equivalent

Part LM5110
Description Dual 5-A Compound Gate Driver
Feature Product Folder Sample & Buy Technical Documents Tools & Software Support & Community LM5110 SNV.
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Total Page 28 Pages
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LM5110
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
LM5110
SNVS255B – MAY 2004 – REVISED SEPTEMBER 2016
LM5110 Dual 5-A Compound Gate Driver With Negative Output Voltage Capability
1 Features
1 Independently Drives Two N-Channel MOSFETs
• Compound CMOS and Bipolar Outputs Reduce
Output Current Variation
• 5A sink/3A Source Current Capability
• Two Channels can be Connected in Parallel to
Double the Drive Current
• Independent Inputs (TTL Compatible)
• Fast Propagation Times (25-ns Typical)
• Fast Rise and Fall Times (14-ns/12-ns Rise/Fall
With 2-nF Load)
• Dedicated Input Ground Pin (IN_REF) for Split
Supply or Single Supply Operation
• Outputs Swing from VCC to VEE Which Can Be
Negative Relative to Input Ground
• Available in Dual Noninverting, Dual Inverting and
Combination Configurations
• Shutdown Input Provides Low Power Mode
• Supply Rail Undervoltage Lockout Protection
• Pin-Out Compatible With Industry Standard Gate
Drivers
• Packages:
– SOIC-8
– WSON-10 (4 mm × 4 mm)
2 Applications
• Synchronous Rectifier Gate Drivers
• Switch-Mode Power Supply Gate Driver
• Solenoid and Motor Drivers
3 Description
The LM5110 Dual Gate Driver replaces industry
standard gate drivers with improved peak output
current and efficiency. Each “compound” output driver
stage includes MOS and bipolar transistors operating
in parallel that together sink more than 5A peak from
capacitive loads. Combining the unique
characteristics of MOS and bipolar devices reduces
drive current variation with voltage and temperature.
Separate input and output ground pins provide
Negative Drive Capability allowing the user to drive
MOSFET gates with positive and negative VGS
voltages. The gate driver control inputs are
referenced to a dedicated input ground (IN_REF).
The gate driver outputs swing from VCC to the output
ground VEE which can be negative with respect to
IN_REF. Undervoltage lockout protection and a
shutdown input pin are also provided. The drivers can
be operated in parallel with inputs and outputs
connected to double the drive current capability. This
device is available in the SOIC-8 and the thermally-
enhanced WSON-10 packages.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LM5110
SOIC (8)
WSON (10)
4.90 mm × 3.91 mm
4.00 mm × 4.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Application Diagram
LM5110
1 IN_REF SHDN 8
RG
INA 2 IN_A OUT_A 7
3 VEE
VCC 6
RG
INB 4 IN_B OUT_B 5
1.0 F
0.1 F
0.1 F
VNEG
VPOS
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



LM5110
LM5110
SNVS255B – MAY 2004 – REVISED SEPTEMBER 2016
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Device Options....................................................... 3
6 Pin Configuration and Functions ......................... 3
7 Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information .................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Switching Characteristics .......................................... 5
7.7 Typical Characteristics .............................................. 7
8 Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description................................................. 10
8.4 Device Functional Modes........................................ 11
9 Applications and Implementation ...................... 12
9.1 Application Information............................................ 12
9.2 Typical Application .................................................. 13
10 Power Supply Recommendations ..................... 15
11 Layout................................................................... 15
11.1 Layout Guidelines ................................................. 15
11.2 Layout Example .................................................... 16
11.3 Thermal Considerations ........................................ 16
12 Device and Documentation Support ................. 19
12.1 Receiving Notification of Documentation Updates 19
12.2 Community Resources.......................................... 19
12.3 Trademarks ........................................................... 19
12.4 Electrostatic Discharge Caution ............................ 19
12.5 Glossary ................................................................ 19
13 Mechanical, Packaging, and Orderable
Information ........................................................... 19
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (November 2012) to Revision B
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
• Added Thermal Information table. ......................................................................................................................................... 4
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