4-Input Multiplexer. CD74HCT253 Datasheet

CD74HCT253 Multiplexer. Datasheet pdf. Equivalent

Part CD74HCT253
Description Dual 4-Input Multiplexer
Feature Data sheet acquired from Harris Semiconductor SCHS170B November 1997 - Revised October 2003 CD74HC2.
Manufacture etcTI
Datasheet
Download CD74HCT253 Datasheet



CD74HCT253
Data sheet acquired from Harris Semiconductor
SCHS170B
November 1997 - Revised October 2003
CD74HC253,
CD74HCT253
High-Speed CMOS Logic
Dual 4-Input Multiplexer
[ /Title
(CD74
HC253
,
CD74
HCT25
3)
/Sub-
ject
(High
Speed
CMOS
Logic
Dual
4-Input
Multi-
plexer)
Features
Description
• Common Select Inputs
• Separate Output-Enable Inputs
• Three-State Outputs
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
The CD74HC253 and CD74HCT253 are dual 4-to-1 line
selector/multiplexers having three-state outputs. One of four
sources for each section is selected by the common select
inputs, S0 and S1. When the output enable (1OE, 2OE) is
HIGH, the output is in the high-impedance state.
Ordering Information
PART NUMBER
TEMP. RANGE (oC) PACKAGE
CD74HC253E
-55 to 125
16 Ld PDIP
CD74HC253M
-55 to 125
16 Ld SOIC
CD74HC253MT
-55 to 125
16 Ld SOIC
CD74HC253M96
-55 to 125
16 Ld SOIC
CD74HCT253E
-55 to 125
16 Ld PDIP
CD74HCT253M
-55 to 125
16 Ld SOIC
CD74HCT253MT
-55 to 125
16 Ld SOIC
CD74HCT253M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
Pinout
CD74HC253, CD74HCT253
(PDIP, SOIC)
TOP VIEW
1OE 1
S1 2
1I3 3
1I2 4
1I1 5
1I0 6
1Y 7
GND 8
16 VCC
15 2OE
14 S0
13 2I3
12 2I2
11 2I1
10 2I0
9 2Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
1
Copyright © 2003, Texas Instruments Incorporated
1



CD74HCT253
CD74HC253, CD74HCT253
Functional Diagrams
2OE
2I3
2I2
2I1
2I0
S0
S1
15
13
12
11
10
14
2
1I0
6
1I1
5
1I2
4
1I3
3
1OE
1
2OE
2OE
16
VCC
8
GND
P
N
2OE
2OE
9
2Y
1OE
1OE
N
P
1OE
1OE
7
1Y
TRUTH TABLE
SELECT INPUTS
(Note 1)
DATA INPUTS
OUTPUT
ENABLE OUTPUT
S1
S0
I0
I1
I2
I3
OE
Y
X
X
X
X
X
X
H
Z
L
L
L
X
X
X
L
L
L
L
H
X
X
X
L
H
L
H
X
L
X
X
L
L
L
H
X
H
X
X
L
H
H
L
X
X
L
X
L
L
H
L
X
X
H
X
L
H
H
H
X
X
X
L
L
L
H
H
X
X
X
H
L
H
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, Z = High Impedance (Off).
NOTE:
1. Select inputs S1 and S0 are common to both sections.
2





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