FRACTIONAL-N PLL. HMC764LP6CE Datasheet

HMC764LP6CE PLL. Datasheet pdf. Equivalent

Part HMC764LP6CE
Description FRACTIONAL-N PLL
Feature HMC764LP6CE v03.0411 FRACTIONAL-N PLL WITH INTEGRATED VCO, 7.3 - 8.2 GHz Features • RF Bandwidth:.
Manufacture Analog Devices
Datasheet
Download HMC764LP6CE Datasheet



HMC764LP6CE
HMC764LP6CE
v03.0411
FRACTIONAL-N PLL WITH
INTEGRATED VCO, 7.3 - 8.2 GHz
Features
RF Bandwidth: 7.3 GHz to 8.2 GHz
Fractional or Integer Modes
Ultra Low Phase Noise
7.8 GHz; 50 MHz Ref.
-98 / -101 dBc/Hz @ 10 kHz (Frac / Int)
-140 dBc/Hz @ 1 MHz (Open Loop)
Figure of Merit (FOM)
-221 / -226 dBc/Hz (Frac / Int)
24-bit Step Size, Resolution 3 Hz typ
225 MHz, 14-bit reference path input
Direct FSK Modulation Mode
Cycle Slip Prevention
Read / Write Serial Port, Chip ID
40 Lead 6 x 6 mm SMT Package: 36 mm²
Typical Applications
7
VSAT Radio
Point-to-Point / Multi-Point Radio
Military End-Use
Phased Array Applications
Test Equipment & Industrial Control
Functional Diagram
7-1
[1] Please refer to the pin description table for details
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Trademarks and registered trademarks aArepthpelpircopaetrityoonf thSeiur rpesppeoctrivte: oPwhneorsn. e: 978-250-33A4p3plicoartioanpSpusp@pohrti:tPtihteo.nceo: 1m-800-ANALOG-D



HMC764LP6CE
v03.0411
HMC764LP6CE
FRACTIONAL-N PLL WITH
INTEGRATED VCO, 7.3 - 8.2 GHz
General Description
The HMC764LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) with an Integrated Voltage
Controlled Oscillator (VCO). The input reference frequency range is 100 kHz to 220 MHz while the advanced delta-
sigma modulator design in the fractional PLL allows both ultra-fine step sizes and very low spurious products. The
highly integrated structure provides excellent phase noise performance over temperature, shock and process. The
HMC764LP6CE is packaged in a leadless QFN 6 x 6 mm surface mount package. The output power is 15 dBm typical,
making the HMC764LP6CE ideal for driving the LO port of many of Hittite’s Hi Linearity and I/Q mixer products.
For theory of operation and register map refer to the “PLLs w/ Integrated VCO - Microwave VCOs” Operating Guide.
To view the Operating Guide, please visit www.hittite.com and choose HMC764LP6CE from the “Search by Part
Number” pull down menu.
Electrical Specifications, TA = +25° C; VCCVCO, VDDCP, VCCCP = +5V; AVCC, VCCPS
VDDPFD, AVDD, RVDD, DVDD, DVDDM, DVDDQ, VDDIO = +3.3V; AGND = DGND = 0V
Parameter
Condition
RF Output Characteristics
VCO Output Frequency Range
VCO Output Power
VCO Tuning Voltage
VCO Tuning Sensitivity
Frequency Pulling (into a 2:1 VSWR)
VTUNE = +5V
Frequency Pushing
Frequency Drift Rate
VTUNE = +5V
Sub Harmonic (1/2)
Harmonic (2nd)
Harmonic (3rd)
VCO SSB Phase Noise @ 100 kHz Offset (Open Loop)
VTUNE = +5V
Fvco = 7.8 GHz
Synthesizer In-Band
SSB Phase Noise @ 10 kHz Offset (Frac/Int)
Fref = 50 MHz Fvco = 7.8 GHz
Loop BW = 100 kHz
Synthesizer Normalized In-Band
SSB Phase Noise Floor (Frac/Int)
Synthesizer Fractional Spurs [1]
Synthesizer Frequency Settling Time
(100 MHz Step)
16-Bit Divider Range (Int)
16-Bit Divider Range (Frac)
From 7.5 GHz to 7.6 GHz
Loop BW = 100 kHz
N Divider Ratio 216+31
N Divider Ratio 216-1
REF Input Characteristics
Max Ref Input Frequency (3.3V)
Min Ref Input Frequency
Ref Input Sensitivity
AC Coupled
Max Ref Input
DC Coupled
Ref Input Capacitance
14-Bit Ref Divider Range
Min.
7.3
12
2
32
36
200
0
16383
Typ.
7.8
130
8
10
1
40
20
35
-116
-98 / -101
-221 / -226
-65
87
225
100
500
Max.
8.2
17
13
65567
65535
200
700
VDDIO
5
1
Units
GHz
dBm
V
MHz/V
MHz pp
MHz/V
MHz/ °C
dBc
dBc
dBc
dBc/Hz
dBc/Hz
dBc/Hz
dBc
μs
MHz
kHz
mVpp
V
pF
[1] Actual spur level is dependent on loop parameters and will increase at division ratios closest to integer boundaries. Number listed is average
value.
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Trademarks and registered trademarks aArepthpelpircopaetrityoonf thSeiur rpesppeoctrivte: oPwhneorsn. e: 978-250-33A4p3plicoartioanpSpusp@pohrti:tPtihteo.nceo: 1m-800-ANALOG-D
7
7-2





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