SPI bridge. SC18IS602B Datasheet

SC18IS602B bridge. Datasheet pdf. Equivalent

Part SC18IS602B
Description I2C-bus to SPI bridge
Feature SC18IS602B I2C-bus to SPI bridge Rev. 7 — 21 October 2019 Product data sheet 1. General descriptio.
Manufacture NXP
Datasheet
Download SC18IS602B Datasheet




SC18IS602B
SC18IS602B
I2C-bus to SPI bridge
Rev. 7 — 21 October 2019
Product data sheet
1. General description
The SC18IS602B is designed to serve as an interface between a standard I2C-bus of a
microcontroller and an SPI bus. This allows the microcontroller to communicate directly
with SPI devices through its I2C-bus. The SC18IS602B operates as an I2C-bus
slave-transmitter or slave-receiver and an SPI master. The SC18IS602B controls all the
SPI bus-specific sequences, protocol, and timing. The SC18IS602B has its own internal
oscillator, and it supports four SPI chip select outputs that may be configured as GPIO
when not used.
2. Features and benefits
I2C-bus slave interface operating up to 400 kHz
SPI master operating up to 1.8 Mbit/s
200-byte data buffer
Up to four slave select outputs
Up to four programmable I/O pins
Operating supply voltage: 2.4 V to 3.6 V
Low power mode
Internal oscillator option
Active LOW interrupt output
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 that exceeds 100 mA
Very small 16-pin TSSOP
3. Applications
Converting I2C-bus to SPI
Adding additional SPI bus controllers to an existing system



SC18IS602B
NXP Semiconductors
SC18IS602B
I2C-bus to SPI bridge
4. Ordering information
Table 1. Ordering information
Type number
Topside
marking
SC18IS602BIPW/S8 IS602B
Package
Name
TSSOP16
Description
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
Version
SOT403-1
4.1 Ordering options
Table 2. Ordering options
Type number
Orderable part number
SC18IS602BIPW/S8 SC18IS602BIPW/S8HP[1]
Package Packing method
TSSOP16 REEL 13" Q4/T2
*STANDARD
MARK SMD
Minimum
order
quantity
2500
Temperature
Tamb = 40 C to
+85 C
[1] NXP plans to supply the /S8 device with an expected discontinuation in the 2024-2025 timeframe, but in the meantime, Failure Analysis
for /S8 devices will consist of Automated Test Equipment (ATE) and electrical overstress verification along with package and wire bond
validation only. Detailed device failure analysis will not be available; refer to CIN 201708035I.
5. Block diagram
SCL
SDA
RESET
INT
I2C-BUS
CONTROL
REGISTER
INTERRUPT
CONTROL
LOGIC
BUFFER
SPI
SC18IS602B
INTERNAL
OSCILLATOR
MOSI
MISO
SPICLK
SS0
SS1 (1)
SS2
SS3
(1) Unused slave select outputs may be used for GPIO.
Fig 1. Block diagram of SC18IS602B
002aac443
SC18IS602B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 21 October 2019
© NXP Semiconductors N.V. 2019. All rights reserved.
2 of 25







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)