DisplayPort multiplexer. CBTL06DP213 Datasheet

CBTL06DP213 multiplexer. Datasheet pdf. Equivalent

Part CBTL06DP213
Description Third generation high-performance DisplayPort multiplexer
Feature CBTL06DP213 Third generation high-performance DisplayPort multiplexer Rev. 4 — 23 March 2017 Prod.
Manufacture NXP
Datasheet
Download CBTL06DP213 Datasheet




CBTL06DP213
CBTL06DP213
Third generation high-performance DisplayPort multiplexer
Rev. 4 — 23 March 2017
Product data sheet
1. General description
CBTL06DP213 is an NXP third generation high-performance multi-channel multiplexer,
meant for DisplayPort (DP) v1.3 or Embedded DisplayPort applications operating at data
rate of 1.62 Gbit/s, 2.7 Gbit/s, 5.4 Gbit/s or 8.1 Gbit/s. It is designed using NXP proprietary
high-bandwidth pass-gate technology and it can be used for 1 : 2 switching or 2 : 1
multiplexing of four high-speed differential AC-coupled DP channels. Further, it is capable
of switching/multiplexing of Hot Plug Detect (HPD) signal as well as Auxiliary (AUX) and
Display Data Channel (DDC) signals. In order to support GPUs/CPUs that have dedicated
AUX and DDC I/Os, CBTL06DP213 provides an additional level of multiplexing of AUX
and DDC signals delivering true flexibility and choice.
A typical application of CBTL06DP213 is on motherboards where one of two GPU
DisplayPort sources needs to be selected to connect to a DisplayPort sink device or
connector. A controller chip selects which path to use by setting a select signal HIGH or
LOW. Due to the bidirectional nature of the signal paths, CBTL06DP213 can also be used
in the reverse topology, for example, to connect one display source device to one of two
display sink devices or connectors.
2. Features and benefits
1 : 2 switching or 2 : 1 multiplexing of DisplayPort (v1.3 - 8.1 Gbit/s) signals
4 high-speed differential channels with 2 : 1 multiplexing/switching for DisplayPort
main link signals
1 channel with 4 : 1 multiplexing/switching for AUX or DDC signals
1 channel with 2 : 1 multiplexing/switching for HPD signal
High-bandwidth analog pass-gate technology
Ron on DP high-speed channels: 14
Low insertion loss:
0.9 dB at 100 MHz
1.3 dB at 2.7 GHz
1.7 dB at 4 GHz
3 dB at 11.1 GHz
Low crosstalk: 35 dB at 2.7 GHz
Low off-state isolation: 30 dB at 2.7 GHz, 25 dB at 4 GHz
Low return loss:
20.3 dB at 100 MHz
16.7 dB at 1.35 GHz
12.9 dB at 2.7 GHz
12 dB at 4 GHz



CBTL06DP213
NXP Semiconductors
CBTL06DP213
Third generation high-performance DisplayPort multiplexer
Very low intra-pair skew (5 ps typical)
Very low inter-pair skew (< 80 ps)
Switch/multiplexer position select CMOS input
DDC and AUX ports tolerant to being pulled to +5 V via 2.2 kresistor
Supports HDMI/DVI incorrect dongle connection
Single 3.3 V power supply
Operation current of 2 mA typical,
ESD 2 kV HBM, 500 V CDM
Available in 5 mm 5 mm, 0.5 mm ball pitch TFBGA48 package
3. Applications
Motherboard applications requiring DisplayPort and PCI Express
switching/multiplexing
Docking stations
Notebook computers
Chip sets requiring flexible allocation of PCI Express or DisplayPort I/O pins to board
connectors
4. Ordering information
Table 1. Ordering information
Type number
Topside Solder process Package
mark
Name
CBTL06DP213EE 6D213
Pb-free (SnAgCu TFBGA48
solder compound)
Description
plastic thin fine-pitch ball grid array package;
48 balls; body 5 5 0.8 mm[1]
Version
SOT918-1
[1] Total height including solder balls after printed circuit board mounting = 1.15 mm maximum.
For more information on product marking, refer to
www.nxp.com/products/related/package-markings.html.
4.1 Ordering options
Table 2. Ordering options
Type number
Orderable part number Package
CBTL06DP213EE CBTL06DP213EE,118 TFBGA48
Packing method
Reel 13” Q1/T1
*standard mark SMD
Minimum
order
quantity
3000
Temperature
Tamb = 40 C to +105 C
CBTL06DP213
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 23 March 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
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