Audio Codec. LM4549B Datasheet

LM4549B Codec. Datasheet pdf. Equivalent

Part LM4549B
Description Multi-Channel Audio Codec
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LM4549B
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LM4549B
SNAS598B – JULY 2012 – REVISED JULY 2015
LM4549B AC '97 Rev 2.1 Multi-Channel Audio Codec With Sample Rate Conversion and TI
3D Sound
1 Features
1 Compliant With AC '97 Rev 2.1
• High-Quality Sample Rate Conversion from 4 kHz
to 48 kHz in 1-Hz Increments
• Multiple Codec Support
• True Line Level Output with Separate Gain
Control
• Texas Instrument's 3D Sound Stereo
Enhancement Circuitry
• Advanced Power Management Support
• External Amplifier Power Down (EAPD) Control
• PC-Beep Passthrough to Line Out During
Initialization or Cold Reset
• Digital 3.3-V and 5-V Supply Options
• Extended Temperature: 40°C TA 85°C
• Key Specifications
– Analog Mixer Dynamic Range: 97 dB (Typical)
– DAC Dynamic Range: 89 dB (Typical)
– ADC Dynamic Range: 90 dB (Typical)
2 Applications
• Desktop PC Audio Systems on PCI Cards, AMR
Cards, or With Motherboard Chips Sets Featuring
AC Link
• Portable PC Systems as on MDC Cards, or With a
Chipset or Accelerator Featuring AC Link
• General and Multichannel Audio Frequency
Systems
• Automotive Telematics
3 Description
The LM4549B device is an audio codec for PC
systems which is fully compliant with the PC99 and
performs the analog intensive functions of the AC '97
Rev 2.1 architecture. Using 18-bit sigma-delta ADCs
and DACs, the LM4549B provides 90 dB of dynamic
range.
The LM4549B was designed specifically to provide a
high quality audio path and provide all analog
functionality in a PC audio system. It features full
duplex stereo ADCs and DACs and analog mixers
with access to 4 stereo and 4 mono inputs. Each
mixer input has separate gain, attenuation and mute
control and the mixers drive 1 mono- and 2-stereo
outputs, each with attenuation and mute control. The
LM4549B supports Texas Instrument's 3D Sound
stereo enhancement and a comprehensive sample
rate conversion capability. The sample rate for the
ADCs and DACs can be programmed separately with
a resolution of 1 Hz to convert any rate in the range 4
kHz – 48 kHz. Sample timing from the ADCs and
sample request timing for the DACs are completely
deterministic to ease task scheduling and application
software development. These features together with
an extended temperature range also make the
LM4549B suitable for non-PC codec applications.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
LM4549B
LQFP (48)
7.00 mm × 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Block Diagram
MIC1
MIC2
AUX
VIDEO
CD
LINE_IN
PHONE
PC_BEEP
MONO_OUT
LNLVL_OUT
LINE_OUT
*
GAIN: D6,0Eh
*0 dB/20 dB
MS
*R
E
$ MONO
MIX
C
O
R
D
S
E
L
E
C
T
MIX
$
0E 10 12 14 16
*
GGGGG
AAAAA
MMMMM
MONO
VOLUME: 06h
Atten Mute
LINE LEVEL
VOLUME: 04h
Atten Mute
0A 0C
G
AA
MM
$
MIX1
D13, 20h
MASTER
+ VOLUME: 02h
Atten Mute
NATIONAL
3D SOUND
$
STEREO
MIX 3D
MIX2
M
U
X
*
POP
POWER SUPPLY
and
REFERENCES
CODEC
IDENTITY
SELECT
1Ch
GAIN
MUTE
18
$ADC
$ADC
18
$&¶97
16
REGISTERS
18h
GAIN
ATTEN
MUTE
18
$DAC
$DAC
18
ID0#
ID1#
XTAL_IN
XTAL_OUT
SDATA_IN
BIT_CLK
SYNC
SDATA_OUT
RESET#
EAPD
STEREO SIGNAL PATH
MONO SIGNAL PATH
DIGITAL SIGNAL PATH
NN
NN (HEX)
Address of Analog Input
Volume Control Register
G
A
M
GAM
Gain Attenuation Mute
(Mute is default)
* Asterisk denotes default
setting after Cold Reset
NNh
Control Register with
hexadecimal address NN
Dm, NNh
Control bit m in Register with
hexadecimal address NN
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.



LM4549B
LM4549B
SNAS598B – JULY 2012 – REVISED JULY 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Description (continued)......................................... 3
6 Pin Configuration and Functions ......................... 4
7 Specifications......................................................... 8
7.1 Absolute Maximum Ratings ...................................... 8
7.2 ESD Ratings.............................................................. 8
7.3 Recommended Operating Conditions....................... 8
7.4 Thermal Information .................................................. 9
7.5 Electrical Characteristics .......................................... 9
7.6 Timing Requirements .............................................. 10
7.7 Typical Characteristics ............................................ 13
8 Detailed Description ............................................ 14
8.1 Overview ................................................................. 14
8.2 Functional Block Diagram ....................................... 14
8.3 Feature Description................................................. 14
8.4 Device Functional Modes........................................ 16
8.5 Programming........................................................... 17
8.6 Register Maps ......................................................... 26
9 Application and Implementation ........................ 32
9.1 Application Information............................................ 32
9.2 Typical Application ................................................. 32
9.3 System Example ..................................................... 34
10 Power Supply Recommendations ..................... 35
11 Layout................................................................... 35
11.1 Layout Guidelines ................................................. 35
12 Device and Documentation Support ................. 36
12.1 Community Resources.......................................... 36
12.2 Trademarks ........................................................... 36
12.3 Electrostatic Discharge Caution ............................ 36
12.4 Glossary ................................................................ 36
13 Mechanical, Packaging, and Orderable
Information ........................................................... 36
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (May 2013) to Revision B
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Original (May 2013) to Revision A
Page
• Changed layout of National Data Sheet to TI format ........................................................................................................... 17
2
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