M-LVDS Transceiver. DS91M040 Datasheet

DS91M040 Transceiver. Datasheet pdf. Equivalent


Part DS91M040
Description 125 MHz Quad M-LVDS Transceiver
Feature DS91M040 www.ti.com SNLS283M – FEBRUARY 2008 – REVISED APRIL 2013 DS91M040 125 MHz Quad M-LVDS Tr.
Manufacture etcTI
Datasheet
Download DS91M040 Datasheet


DS91M040 125 MHz Quad M-LVDS Transceiver May 13, 2008 DS91 DS91M040 Datasheet
DS91M040 www.ti.com SNLS283M – FEBRUARY 2008 – REVISED APR DS91M040 Datasheet
Recommendation Recommendation Datasheet DS91M040 Datasheet




DS91M040
DS91M040
www.ti.com
SNLS283M – FEBRUARY 2008 – REVISED APRIL 2013
DS91M040 125 MHz Quad M-LVDS Transceiver
Check for Samples: DS91M040
FEATURES
1
2 DC - 125 MHz / 250 Mbps Low Jitter, Low
Skew, Low Power Operation
• Wide Input Common Mode Voltage Range
Allows up to ±1V of GND Noise
• Conforms to TIA/EIA-899 M-LVDS Standard
• Pin Selectable M-LVDS Receiver Type (1 or 2)
• Controlled Transition Times (2.0 ns typ)
Minimize Reflections
• 8 kV ESD on M-LVDS I/O pins protects
adjoining components
• Flow-Through Pinout Simplifies PCB Layout
• Small 5 mm x 5 mm WQFN-32 Space Saving
Package
APPLICATIONS
• Multidrop / Multipoint Clock and Data
Distribution
• High-Speed, Low Power, Short-Reach
Alternative to TIA/EIA-485/422
• Clock Distribution in AdvancedTCA (ATCA)
and MicroTCA (μTCA, uTCA) Backplanes
DESCRIPTION
The DS91M040 is a quad M-LVDS transceiver
designed for driving / receiving clock or data signals
to / from up to four multipoint networks.
M-LVDS (Multipoint LVDS) is a new family of bus
interface devices based on LVDS technology
specifically designed for multipoint and multidrop
cable and backplane applications. It differs from
standard LVDS in providing increased drive current to
handle double terminations that are required in multi-
point applications. Controlled transition times
minimize reflections that are common in multipoint
configurations due to unterminated stubs. M-LVDS
devices also have a very large input common mode
voltage range for additional noise margin in heavily
loaded and noisy backplane environments.
A single DS91M040 channel is a half-duplex
transceiver that accepts LVTTL/LVCMOS signals at
the driver inputs and converts them to differential M-
LVDS signal levels. The receiver inputs accept low
voltage differential signals (LVDS, BLVDS, M-LVDS,
LVPECL and CML) and convert them to 3V LVCMOS
signals. The DS91M040 supports both M-LVDS type
1 and type 2 receiver inputs.
System Diagram
Line Card in SLOT 1
DS91M040
Line Card in SLOT N-1
M-LVDS Receivers
Line Card in SLOT N
M-LVDS Receivers
RT
Z0
RT
RT
Z0
RT
RT
Z0
RT
RT
Z0
RT
RT = ZLOADED
BACKPLANE
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated



DS91M040
DS91M040
SNLS283M – FEBRUARY 2008 – REVISED APRIL 2013
Connection Diagram
RO0 1
DI0 2
RO1 3
DI1 4
RO2 5
DI2 6
RO3 7
DI3 8
DAP
(GND)
24 B0
23 A0
22 B1
21 A1
20 B2
19 A2
18 B3
17 A3
Logic Diagram
FSEN1
DE0
B0
DI0
A0
RE0
RO0
DE1
B1
DI1
A1
RE1
RO1
MDE
DE2
B2
DI2
A2
RE2
RO2
DE3
B3
DI3
A3
RE3
RO3
FSEN2
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2
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