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FLASH MEMORY. 25Q32FVAIQ Datasheet

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FLASH MEMORY. 25Q32FVAIQ Datasheet






25Q32FVAIQ MEMORY. Datasheet pdf. Equivalent




25Q32FVAIQ MEMORY. Datasheet pdf. Equivalent





Part

25Q32FVAIQ

Description

3V 32M-BIT SERIAL FLASH MEMORY



Feature


W25Q32FV 3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI Publication Re lease Date: October 20, 2015 Revision I W25Q32FV Table of Contents 1. GENERAL DESCRIPTIONS ......................... ....................................... ....................................... ......5 2. FEATURES ................... ....................................... ...................
Manufacture

Winbond

Datasheet
Download 25Q32FVAIQ Datasheet


Winbond 25Q32FVAIQ

25Q32FVAIQ; ........................................ ...................5 3. PACKAGE TYPES A ND PIN CONFIGURATIONS ................. ....................................... ..................6 3.1 Pin Configurati on SOIC 208-mil / VSOP 208-mil......... ....................................... ..................6 3.2 Pad Configurati on WSON 6x5-mm / 8x6-mm................ ...................


Winbond 25Q32FVAIQ

.....................................6 3 .3 Pin Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6-mm ................. .....................6 3.4 Pin Configur ation SOIC 300-mil..................... ....................................... ................................7 3.5 P in Description SOIC 300-mil ........... ....................................... ...................


Winbond 25Q32FVAIQ

...........................7 3.6 Ball Co nfiguration TFBGA 8x6-mm (5x5 or 6x4 Ba ll Array) ............................. ....................7 3.7 Ball Descript ion TFBGA 8x6-mm....................... ....................................... ............................8 3.8 Pin C onfiguration PDIP 300-mil ............. ....................................... ...................

Part

25Q32FVAIQ

Description

3V 32M-BIT SERIAL FLASH MEMORY



Feature


W25Q32FV 3V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI Publication Re lease Date: October 20, 2015 Revision I W25Q32FV Table of Contents 1. GENERAL DESCRIPTIONS ......................... ....................................... ....................................... ......5 2. FEATURES ................... ....................................... ...................
Manufacture

Winbond

Datasheet
Download 25Q32FVAIQ Datasheet




 25Q32FVAIQ
W25Q32FV
3V 32M-BIT
SERIAL FLASH MEMORY WITH
DUAL/QUAD SPI & QPI
Publication Release Date: October 20, 2015
Revision I




 25Q32FVAIQ
W25Q32FV
Table of Contents
1. GENERAL DESCRIPTIONS .............................................................................................................5
2. FEATURES .......................................................................................................................................5
3. PACKAGE TYPES AND PIN CONFIGURATIONS ..........................................................................6
3.1 Pin Configuration SOIC 208-mil / VSOP 208-mil..................................................................6
3.2 Pad Configuration WSON 6x5-mm / 8x6-mm.......................................................................6
3.3 Pin Description SOIC / VSOP 208-mil, WSON 6x5-mm / 8x6-mm ......................................6
3.4 Pin Configuration SOIC 300-mil............................................................................................7
3.5 Pin Description SOIC 300-mil ...............................................................................................7
3.6 Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array) .................................................7
3.7 Ball Description TFBGA 8x6-mm..........................................................................................8
3.8 Pin Configuration PDIP 300-mil ............................................................................................9
3.9 Pin Description PDIP 300-mil ...............................................................................................9
4. PIN DESCRIPTIONS ......................................................................................................................10
4.1 Chip Select (/CS) ................................................................................................................10
4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3)...................................10
4.3 Write Protect (/WP) .............................................................................................................10
4.4 HOLD (/HOLD)....................................................................................................................10
4.5 Serial Clock (CLK) ..............................................................................................................10
4.6 Reset (/RESET) ..................................................................................................................10
5. BLOCK DIAGRAM ..........................................................................................................................11
6. FUNCTIONAL DESCRIPTIONS .....................................................................................................12
6.1 SPI / QPI Operations ..........................................................................................................12
6.1.1 Standard SPI Instructions .................................................................................................... 12
6.1.2 Dual SPI Instructions ........................................................................................................... 12
6.1.3 Quad SPI Instructions .......................................................................................................... 13
6.1.4 QPI Instructions ................................................................................................................... 13
6.1.5 Hold Function....................................................................................................................... 13
6.1.6 Software Reset & Hardware /RESET pin ............................................................................. 14
6.2 Write Protection ..................................................................................................................15
6.2.1 Write Protect Features ......................................................................................................... 15
7. STATUS AND CONFIGURATION REGISTERS ............................................................................16
7.1 Status Registers..................................................................................................................16
7.1.1 Erase/Write In Progress (BUSY) Status Only ................................................................... 16
7.1.2 Write Enable Latch (WEL) Status Only ............................................................................. 16
7.1.3 Block Protect Bits (BP2, BP1, BP0) Volatile/Non-Volatile Writable ................................... 16
7.1.4 Top/Bottom Block Protect (TB) Volatile/Non-Volatile Writable .......................................... 17
-1-




 25Q32FVAIQ
W25Q32FV
7.1.5 Sector/Block Protect Bit (SEC) Volatile/Non-Volatile Writable .......................................... 17
7.1.6 Complement Protect (CMP) Volatile/Non-Volatile Writable............................................... 17
7.1.7 Status Register Protect (SRP1, SRP0) Volatile/Non-Volatile Writable .............................. 17
7.1.8 Erase/Program Suspend Status (SUS) Status Only ......................................................... 18
7.1.9 Security Register Lock Bits (LB3, LB2, LB1) Volatile/Non-Volatile OTP Writable ............. 18
7.1.10 Quad Enable (QE) Volatile/Non-Volatile Writable ........................................................... 18
7.1.11 Write Protect Selection (WPS) Volatile/Non-Volatile Writable......................................... 19
7.1.12 Output Driver Strength (DRV1, DRV0) Volatile/Non-Volatile Writable ............................ 19
7.1.13 HOLD or /RESET Pin Function (HOLD/RST) Volatile/Non-Volatile Writable .................. 19
7.1.14 Reserved Bits Non Functional ........................................................................................ 19
7.1.15 W25Q32FV Status Register Memory Protection (WPS = 0, CMP = 0) .............................. 20
7.1.16 W25Q32FV Status Register Memory Protection (WPS = 0, CMP = 1) .............................. 21
7.1.17 W25Q32FV Individual Block Memory Protection (WPS=1)................................................ 22
8. INSTRUCTIONS .............................................................................................................................23
8.1 Device ID and Instruction Set Tables .................................................................................23
8.1.1 Manufacturer and Device Identification ................................................................................ 23
8.1.2 Instruction Set Table 1 (Standard/Dual/Quad SPI Instructions)(1) ........................................ 24
8.1.3 Instruction Set Table 2 (Standard/Dual/Quad SPI Instructions)(1) ........................................ 25
8.1.4 Instruction Set Table 3 (QPI Instructions)(14) ........................................................................ 26
8.2 Instruction Descriptions ......................................................................................................28
8.2.1 Write Enable (06h) ............................................................................................................... 28
8.2.2 Write Enable for Volatile Status Register (50h).................................................................... 28
8.2.3 Write Disable (04h) .............................................................................................................. 29
8.2.4 Read Status Register-1 (05h), Status Register-2 (35h) & Status Register-3 (15h) .............. 29
8.2.5 Write Status Register-1 (01h), Status Register-2 (31h) & Status Register-3 (11h) .............. 30
8.2.6 Read Data (03h) .................................................................................................................. 33
8.2.7 Fast Read (0Bh) .................................................................................................................. 34
8.2.8 Fast Read Dual Output (3Bh) .............................................................................................. 36
8.2.9 Fast Read Quad Output (6Bh) ............................................................................................. 37
8.2.10 Fast Read Dual I/O (BBh) .................................................................................................. 38
8.2.11 Fast Read Quad I/O (EBh)................................................................................................. 40
8.2.12 Word Read Quad I/O (E7h) ............................................................................................... 43
8.2.13 Octal Word Read Quad I/O (E3h) ...................................................................................... 45
8.2.14 Set Burst with Wrap (77h) .................................................................................................. 47
8.2.15 Page Program (02h) .......................................................................................................... 48
8.2.16 Quad Input Page Program (32h)........................................................................................ 50
8.2.17 Sector Erase (20h)............................................................................................................. 51
8.2.18 32KB Block Erase (52h)..................................................................................................... 52
8.2.19 64KB Block Erase (D8h) .................................................................................................... 53
8.2.20 Chip Erase (C7h / 60h) ...................................................................................................... 54
8.2.21 Erase / Program Suspend (75h) ........................................................................................ 55
Publication Release Date: October 20, 2015
-2-
Revision I



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