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TC358840XBG

Part Number	TC358840XBG
Manufacturer	Toshiba
Description	Mobile Peripheral
Published	Jan 20, 2021
Detailed Description	TC358840XBG CMOS Digital Integrated Circuit Silicon Monolithic TC358840XBG Mobile Peripheral Devices Overview TC358840X...
Datasheet	TC358840XBG PDF File

Overview

TC358840XBG CMOS Digital Integrated Circuit Silicon Monolithic TC358840XBG Mobile Peripheral Devices Overview TC358840XBG, Ultra HD to CSI-2, bridge converts high resolution (higher than 4 Gbps) HDMI® stream to MIPI® CSI-2 Tx video.
It is a follow up device of TC358743XBG.
The HDMI-RX runs at 297 MHz to carry up to 7.
2 Gbps video stream.
It requires dual link MIPI CSI-2 Tx, 1 Gbps/data lane, to transmit out a maximum 7.
2 Gbps video data.
The bridge chip is necessary for current and next generation Application Processors which have been designed without video stream input port except CSI-2 Rx.
TC358840XBG P-VFBGA80-0707-0.
65-001 Weight: 67 mg (Typ.
) Features ● HDMI-RX Interface  HDMI 1.
4b - Video Formats Support (Up to 4K×2K / 30fps), maximum 24 bps (bit-per-pixel) no deep color support  RGB, YCbCr444: 24-bpp  YCbCr422: 24-bpp - Color Conversion  4:2:2 to 4:4:4 is supported  4:4:4: to 4:2:2 is supported  RGB888 to YCbCr (4:4:4 / 4:2:2) is supported  YCbCr (4:4:4 / 4:2:2) to RGB888/666 is supported  Note: for RGB666 (R=R[5:0],2'b00, G=G[5:0],2'b00, B=G[5:0],2'b00) - Maximum HDMI clock speed: 297 MHz - Audio Supports  Internal Audio PLL to track N/CTS value transmitted by the ACR packet.
- 3D Support - Support HDCP1.
4 decryptions (optional) - EDID Support, Release A, Revision 1 (Feb 9, 2000)  First 128 byte (EDID 1.
3 structure)  First E-EDID Extension: 128 bytes of CEA Extension version 3 (specified in CEA-861-D)  Embedded 1K-byte SRAM (EDID_SRAM)  Does not support Audio Return Path and HDMI Ethernet Channels ● CSI-2 TX Interface (This function is supported only by TC358840XBG )  MIPI CSI-2 compliant (Version 1.
01 Revision 0.
04 – 2 April 2009)  Dual links CSI-2 (CSI0 and CSI1), each link supports 4 data lanes @ 1 Gbps/data lane - CSI0 carries the left half data of HDMI Rx video stream and CSI1 carries the right one at the default configuration.
- Left or right data can be assigned/programmed to either CSI-2 Tx link - The maximum length of each half i...

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TC358840XBG Mobile Peripheral - Toshiba

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