TRANSLATING TRANSCEIVER. 74LVC2T45 Datasheet

74LVC2T45 TRANSCEIVER. Datasheet pdf. Equivalent

74LVC2T45 Datasheet
Recommendation 74LVC2T45 Datasheet
Part 74LVC2T45
Description DUAL BIT DUAL POWER SUPPLY TRANSLATING TRANSCEIVER
Feature 74LVC2T45; 74LVC2T45 DUAL BIT DUAL POWER SUPPLY TRANSLATING TRANSCEIVER WITH 3 STATE OUTPUTS Description The 7.
Manufacture Diodes
Datasheet
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Diodes 74LVC2T45
74LVC2T45
DUAL BIT DUAL POWER SUPPLY TRANSLATING
TRANSCEIVER WITH 3 STATE OUTPUTS
Description
The 74LVC2T45 is a dual-bit, dual-supply transceiver with tri-state
outputs suitable for transmitting two logic bits across different
voltage domains. The direction pin (DIR) and Port A, consisting of
pins 1A and 2A, have logic levels in relation to VCC(A) while port B,
consisting of pins 1B and 2B have logic levels related to VCC(B).
This arrange- ment allows for universal low-voltage translation
between any voltages from 1.2V to 5.5V. When a HIGH logic level
is applied to the direction pin, port A pins become inputs and port B
pins are outputs. Conversely, the roles of the ports are reversed
when the direction pin is asserted LOW.
The tri-state (Ioff) feature places all port pins in a high impedance
state when either power supply is at 0V, which prevents and
damages backflow currents and provides power-down electrical
isolation up to 5.5V as not to interfere with any logic activity on
either of the ports.
Features
Wide Supply Voltage Range:
VCC(A): from 1.2V to 5.5V
VCC(B): from 1.2V to 5.5V
± 24mA Output Drive at 3.3V
CMOS Low Power Consumption 16µA Maximum ICC
High Noise Immunity
IOFF Supports Partial-Power-Down Mode Operation
IOFF Controlled by Either VCC Being at 0V
Inputs Accept up to 5.5V
Maximum data rates:
420Mbps (3.3V to 5V translation)
210Mbps (translate to 3.3V)
140Mbps (translate to 2.5V)
75Mbps (translate to 1.8V)
60Mbps (translate to 1.5V)
ESD Protection Exceeds JESD 22
4000-V Human Body Model (A114)
1000 V Charged Device Model ( C101)
Latch-up Exceeds 100mA per JESD 78, Class I
Specified from -40°C to +85°C and -40°C to +125°C
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
For automotive applications requiring specific change
control (i.e. parts qualified to AEC-Q100/101/200, PPAP
capable, and manufactured in IATF 16949 certified facilities),
please contact us or your local Diodes representative.
https://www.diodes.com/quality/product-definitions/
Pin Assignments
( Top View )
VCC(A) 1
8 VCC(B)
1A 2
7 1B
2A 3
6 2B
GND 4
5 DIR
X2-DFN1210-8
X2-DFN1410-8
Applications
Voltage Level Translation
Well-Suited to Join Logic Types Operating at Different Voltages
Power-Down Signal Isolation
If Either Voltage Domain is Turned Off the Signal is Isolated and
There is No Loading on Signal Lines
Wide Array of Products, such as:
Cell Phones, Tablets, E-Readers
PCs, Notebooks, Netbooks, Ultrabooks
Networking, Routers, Gateways
Computer Peripherals, Hard Drives, CD/DVD ROM
TV, DVD, DVR, Set-Top Box
Personal Navigation / GPS
MP3 Players, Cameras, Video Recorders
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and
Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
74LVC2T45
Document number: DS43360 Rev. 1 - 2
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January 2021
© Diodes Incorporated



Diodes 74LVC2T45
Pin Descriptions
Pin Name
VCC(A)
1A
2A
GND
DIR
2B
1B
VCC(B)
Pin
Function
1
Supply for I/O Pin A; Reference for DIR
2
Data Input/Output
3
Data Input/Output
4
Ground
5
Direction Control
6
Data Input/Output
7
Data Input/Output
8
Supply for I/O Pin B
Logic Diagram
DIR
1A
1B
2A
VCC(A)
2B
VCC(B)
74LVC2T45
Function Tables
Input
DIR (Direction Pin)
L
H
Inputs
A
B
DIR
Note 4
L
L
Note 4
H
L
L
Note 4
H
H
Note 4
H
Note:
4. Pin condition not applicable as defined by DIR.
A
L
H
Note 4
Note 4
Operation
B Data to A Output
A Data to B Output
Outputs
B
Note 4
Note 4
L
H
74LVC2T45
Document number: DS43360 Rev. 1 - 2
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Diodes 74LVC2T45
74LVC2T45
Absolute Maximum Ratings (Note 5) (@TA = +25°C, unless otherwise specified.)
Symbol
Parameter
Rating
Unit
ESD HBM
Human Body Model ESD Protection
4
KV
ESD CDM
Charged Device Model ESD Protection
1
KV
VCC(A), VCC(B) Supply Voltage Range
-0.5 to +6.5
V
VI
Input Voltage Range
-0.5 to +6.5
V
VO
Voltage Applied to Output in High Impedance or IOFF State
-0.5 to +6.5
V
A Pin
-0.3 to VCC(A) +0.5
V
VO
Voltage Applied to Output in High or Low State
B Pin
-0.3 to VCC(B) +0.5
V
IIK
Input Clamp Current VI < 0
-50
mA
IOK
Output Clamp Current
-50
mA
IO
Continuous Output Current
±50
mA
Continuous Current Through VCC or GND
±100
mA
TJ
Operating Junction Temperature
-40 to +150
°C
TSTG
Storage Temperature
-65 to +150
°C
Note:
5. Stresses beyond the absolute maximum can result in immediate failure or reduced reliability. These are stress values and device operation should be
within recommend values.
Recommended Operating Conditions (Note 6) (@TA = +25°C, unless otherwise specified.)
Symbol
Parameter
Conditions
Min
VCC(A)
VCC(B)
VI
Supply Voltage A
Supply Voltage B
Input Voltage
1.2
1.2
0
VO
Output Voltage
Active Mode (Note 6)
0
Suspend or 3-State Mode
0
TA
Ambient Temperature
-40
VCCI = 1.2V
(Note 7)
VCCI = 1.4V to 1.95V
Δt/ΔV
Input Transition Rise and Fall Rate
VCCI = 2.3V to 2.7V
VCCI = 3V to 3.6V
VCCI = 4.5V to 5.5V
Notes:
6. VCCO is the supply voltage associated with the output port.
7. VCCI is the supply voltage associated with the input port.
Max
5.5
5.5
5.5
VCCO
5.5
+125
20
20
20
10
5
Unit
V
V
V
V
V
°C
ns/V
ns/V
ns/V
ns/V
ns/V
74LVC2T45
Document number: DS43360 Rev. 1 - 2
3 of 15
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January 2021
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