Stereo ADC. TLV320ADC3001 Datasheet

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TLV320ADC3001
SLAS548D – OCTOBER 2008 – REVISED SEPTEMBER 2015
TLV320ADC3001 Low-Power Stereo ADC With Embedded miniDSP
for Wireless Handsets and Portable Audio
1 Features
• Stereo Audio ADC
– 92-dBA Signal-to-Noise Ratio
– Supports ADC Sample Rates From 8 kHz to
96 kHz
• Instruction-Programmable Embedded miniDSP
• Flexible Digital Filtering With RAM Programmable
Coefficient, Instructions, and Built-In Standard
Modes
– Low-Latency IIR Filters for Voice
– Linear Phase FIR Filters for Audio
– Additional Programmable IIR Filters for EQ,
Noise Cancellation, or Reduction
– Up to 128 Programmable ADC Digital Filter
Coefficients
• Three Audio Inputs With Configurable Automatic
Gain Control (AGC)
– Programmable in Single-Ended or Fully
Differential Configurations
– Can Be Driven Hi-Z for Easy Interoperability
With Other Audio ICs
• Low Power Consumption and Extensive Modular
Power Control:
– 6-mW Mono Record 8-kHz
– 11-mW Stereo Record, 8-kHz
– 10-mW Mono Record, 48-kHz
– 17-mW Stereo Record, 48-kHz
• Programmable Microphone Bias
• Programmable PLL for Clock Generation
• I2C Control Bus
• Audio Serial Data Bus Supports I2S, Left/Right-
Justified, DSP, PCM, and TDM Modes
• Power Supplies:
– Analog: 2.6 V–3.6 V.
– Digital: Core: 1.65 V–1.95 V,
I/O: 1.1 V–3.6 V
1
• 2.24-mm × 2.16-mm NanoFree™ 16-Ball 16-YZH
Wafer Chip Scale Package (WCSP)
2 Applications
• Wireless Handsets
• Portable Low-Power Audio Systems
• Noise Cancellation Systems
• Front-End Voice or Audio Processor for Digital
Audio
3 Description
The TLV320ADC3001 device is a low-power, stereo
audio analog-to-digital converter (ADC) supporting
sampling rates from 8 kHz to 96 kHz with an
integrated programmable-gain amplifier providing up
to 40-dB analog gain or AGC. A programmable
miniDSP is provided for custom audio processing.
Front-end input coarse attenuation of 0 dB, –6 dB, or
off, is also provided. The inputs are programmable in
a combination of single-ended or fully differential
configurations. Extensive register-based power
control is available via I2C, enabling mono or stereo
recording. Low power consumption makes the
TLV320ADC3001 ideal for battery-powered portable
equipment.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TLV320ADC3001 DSBGA (16)
2.24 mm × 2.16 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Functional Block Diagram
Processor
I2C
ADC
I2S, LJ, RJ, DSP, TDM
miniDSP
ADC
TLV320ADC3001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.


TLV320ADC3001 Datasheet
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Description Low-Power Stereo ADC
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TLV320ADC3001
SLAS548D – OCTOBER 2008 – REVISED SEPTEMBER 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Description (continued)......................................... 4
6 Device Comparison Table..................................... 4
7 Pin Configuration and Functions ......................... 5
8 Specifications......................................................... 6
8.1 Absolute Maximum Ratings ...................................... 6
8.2 ESD Ratings.............................................................. 6
8.3 Recommended Operating Conditions....................... 6
8.4 Thermal Information .................................................. 6
8.5 Electrical Characteristics........................................... 7
8.6 Dissipation Ratings .................................................. 8
8.7 I2S/LJF/RJF Timing in Master Mode......................... 8
8.8 DSP Timing in Master Mode ..................................... 8
8.9 I2S/LJF/RJF Timing in Slave Mode........................... 9
8.10 DSP Timing in Slave Mode ..................................... 9
8.11 Typical Characteristics .......................................... 12
9 Parameter Measurement Information ................ 12
10 Detailed Description ........................................... 13
10.1 Overview ............................................................... 13
10.2 Functional Block Diagram ..................................... 13
10.3 Feature Description............................................... 14
10.4 Device Functional Modes...................................... 40
10.5 Programming......................................................... 40
10.6 Register Maps ....................................................... 42
11 Application and Implementation........................ 74
11.1 Application Information.......................................... 74
11.2 Typical Application ............................................... 74
12 Power Supply Recommendations ..................... 78
13 Layout................................................................... 79
13.1 Layout Guidelines ................................................. 79
13.2 Layout Example .................................................... 79
14 Device and Documentation Support ................. 80
14.1 Community Resources.......................................... 80
14.2 Trademarks ........................................................... 80
14.3 Electrostatic Discharge Caution ............................ 80
14.4 Glossary ................................................................ 80
15 Mechanical, Packaging, and Orderable
Information ........................................................... 80
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (April 2011) to Revision D
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision B (March 2010) to Revision C
Page
• Changed pinout diagram to top view...................................................................................................................................... 5
• Inserted missing table reference .......................................................................................................................................... 75
Changes from Revision A (November, 2008) to Revision B
Page
• Added miniDSP to data-sheet title.......................................................................................................................................... 1
• Added miniDSP bullet to the Features list.............................................................................................................................. 1
• Added a sentence about the miniDSP to the Description section.......................................................................................... 1
• Deleted YZH and WCSP options from the SIMPLIFIED BLOCK DIAGRAM. ........................................................................ 4
• Alphabetized Pin Functions table ........................................................................................................................................... 5
• Changed "complacence" to "compliance" in Note 2 of the Abs Max table............................................................................. 6
• Changed θJA to RθJA ............................................................................................................................................................... 6
• Added AVDD = 3.3 V to Electrical Characteristics condition statement................................................................................. 7
• Added input common-mode voltage row to Electrical Characteristics table .......................................................................... 7
• Added integrated noise row to Electrical Characteristics ....................................................................................................... 8
• Added AVDD = 3.3 V to Electrical Characteristics condition statement................................................................................. 8
• Added metric dimensions to Note 1 of the DISSIPATIONS RATINGS table ......................................................................... 8
• Added rise and fall times to the waveform, Figure 1 ............................................................................................................ 10
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TLV320ADC3001
SLAS548D – OCTOBER 2008 – REVISED SEPTEMBER 2015
• Added rise and fall times to waveform, Figure 2 .................................................................................................................. 10
• Added rise and fall times to waveform, Figure 3 .................................................................................................................. 10
• Changed signs of nonzero errors in % ERROR column ...................................................................................................... 24
Changes from Original (September 2008) to Revision A
Page
• Changed Figure 4 - DSP Timing in Slave Mode. Added the WCLK text note. .................................................................... 11
• Removed note following the page 0 / register 94 description table ..................................................................................... 58
• Changed bit values from 1 and 2 to 0 and 1, respectively. .................................................................................................. 58
• Listed values 81 through 127 as reserved ........................................................................................................................... 58
• Replaced the listing of page-4 registers ............................................................................................................................... 64
• Added a listing for page-5 registers...................................................................................................................................... 69
• Changed Figure 44 Typical Connections ............................................................................................................................. 74
Copyright © 2008–2015, Texas Instruments Incorporated
Product Folder Links: TLV320ADC3001
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