PWM Switcher. TPS54314-Q1 Datasheet

TPS54314-Q1 Switcher. Datasheet pdf. Equivalent

TPS54314-Q1 Datasheet
Recommendation TPS54314-Q1 Datasheet
Part TPS54314-Q1
Description Synchronous-Buck PWM Switcher
Feature TPS54314-Q1; Obsolete Devices: TPS54314-Q1 and TPS54315-Q1 www.ti.com Typical Size (6,3 mm x 6,4 mm) TPS54311-.
Manufacture etcTI
Datasheet
Download TPS54314-Q1 Datasheet




etcTI TPS54314-Q1
Obsolete Devices:
TPS54314-Q1 and TPS54315-Q1
www.ti.com
Typical Size
(6,3 mm x 6,4 mm)
TPS54311-Q1, TPS54312-Q1
TPS54313-Q1, TPS54314-Q1
TPS54315-Q1, TPS54316-Q1
SGLS242G − OCTOBER 2004 − REVISED SEPTEMBER 2008
3-V TO 6-V INPUT, 3-A OUTPUT SYNCHRONOUS-BUCK PWM
SWITCHER WITH INTEGRATED FETs (SWIFT)
FEATURES
D Qualified for Automotive Applications
D 60-mMOSFET Switches for High Efficiency
at 3-A Continuous Output Source or Sink
Current
D 0.9-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V Fixed
Output Voltage Devices With 1% Initial
Accuracy
D Internally Compensated for Low Parts Count
D Fast Transient Response
D Wide PWM Frequency: Fixed 350 kHz,
550 kHz, or Adjustable 280 kHz to 700 kHz
D Load Protected by Peak Current Limit and
Thermal Shutdown
D Integrated Solution Reduces Board Area and
Total Cost
APPLICATIONS
D Low-Voltage, High-Density Systems With
Power Distributed at 5 V or 3.3 V
D Point of Load Regulation for High
Performance DSPs, FPGAs, ASICs, and
Microprocessors
D Broadband, Networking and Optical
Communications Infrastructure
D Automotive Telematics
DESCRIPTION
As members of the SWIFT family of dc/dc regulators, the
TPS54311, TPS54312, TPS54313, TPS54314,
TPS54315, and TPS54316 low-input-voltage high-output
current synchronous-buck PWM converters integrate all
required active components. Included on the substrate
with the listed features are a true, high performance,
voltage error amplifier that provides high performance
under transient conditions; an undervoltage-lockout circuit
to prevent start-up until the input voltage reaches 3 V; an
internally and externally set slow-start circuit to limit
in-rush currents; and a power good output useful for
processor/logic reset, fault signaling, and supply
sequencing.
The TPS54311, TPS54312, TPS54313, TPS54314,
TPS54315, and TPS54316 devices are available in a
thermally enhanced 20-pin TSSOP (PWP) PowerPAD
package, which eliminates bulky heatsinks. Texas
Instruments provides evaluation modules and the SWIFT
designer software tool to aid in quickly achieving
high-performance power supply designs to meet
aggressive equipment development cycles.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD and SWIFT are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Copyright 2008, Texas Instruments Incorporated



etcTI TPS54314-Q1
TPS54311-Q1, TPS54312-Q1
TPS54313-Q1, TPS54314-Q1
TPS54315-Q1, TPS54316-Q1
Obsolete Devices:
TPS54314-Q1 and TPS54315-Q1
SGLS242G − OCTOBER 2004 − REVISED SEPTEMBER 2008
www.ti.com
Simplified Schematic
EFFICIENCY
vs
LOAD CURRENT
96
Input
VIN
PH
TPS54316
BOOT
PGND
VBIAS
VSENSE
GND
ORDERING INFORMATION(1)
Output
94
92
90
88
86
84
TA = 25°C
82 VI = 5 V
VO = 3.3 V
80
0 0.5
1
1.5 2 2.5
3
Load Current − A
TJ
OUTPUT
VOLTAGE
PACKAGED DEVICES
PLASTIC HTSSOP (PWP)(2)
TJ
OUTPUT
VOLTAGE
PACKAGED DEVICES
PLASTIC HTSSOP (PWP)(2)
0.9 V
TPS54311QPWPRQ1(3)
1.8 V
TPS54314QPWPRQ1(3)
−40°C to 125°C
1.2 V
1.5 V
TPS54312QPWPRQ1
TPS54313QPWPRQ1(3)
−40°C to 125°C
2.5 V
3.3 V
TPS54315QPWPRQ1
TPS54316QPWPRQ1(3)
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
(2) The PWP package is taped and reeled as indicated by the R suffix. See application section of data sheet for PowerPAD drawing and layout
information.
(3) Product Preview
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
VIN, SS/ENA, FSEL
Input voltage range, VI
RT
VSENSE
BOOT
Output voltage range, VO
VBIAS, PWRGD, COMP
PH
Source current, IO
PH
COMP, VBIAS
PH
Sink current
COMP
SS/ENA,PWRGD
Voltage differential
AGND to PGND
Operating virtual junction temperature range, TJ
Storage temperature, Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
−0.3 V to 7 V
−0.3 V to 6 V
−0.3 V to 4 V
−0.3 V to 17 V
−0.3 V to 7 V
−0.6 V to 10 V
Internally Limited
6 mA
6A
6 mA
10 mA
±0.3 V
−40°C to 150°C
−65°C to 150°C
300°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Input voltage range, VI
Operating junction temperature, TJ
MIN NOM
3
−40
MAX
6
125
UNIT
V
°C
2



etcTI TPS54314-Q1
www.ti.com
Obsolete Devices:
TPS54314-Q1 and TPS54315-Q1
TPS54311-Q1, TPS54312-Q1
TPS54313-Q1, TPS54314-Q1
TPS54315-Q1, TPS54316-Q1
SGLS242G − OCTOBER 2004 − REVISED SEPTEMBER 2008
PACKAGE DISSIPATION RATINGS(1) (2)
PACKAGE
THERMAL IMPEDANCE
JUNCTION-TO-AMBIENT
TA = 25°C
POWER RATING
TA = 70°C
POWER RATING
20-Pin PWP with solder
26°C/W
3.85 W(3)
2.12 W
20-Pin PWP without solder
57.5°C/W
1.73 W
0.96 W
(1) For more information on the PWP package, see the Texas Instruments technical brief (SLMA002).
(2) Test board conditions:
1. 3” × 3”, 2 layers, Thickness: 0.062”
2. 1.5 oz copper traces located on the top of the PCB
3. 1.5 oz copper ground plane on the bottom of the PCB
4. Ten thermal vias (see the recommended land pattern in the Applications section of this data sheet)
(3) Maximum power dissipation may be limited by overcurrent protection.
TA = 85°C
POWER RATING
1.54 W
0.69 W
ELECTRICAL CHARACTERISTICS
TJ = −40°C to 125°C, VIN = 3 V to 6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
SUPPLY VOLTAGE, VIN
VIN Input voltage range
Quiescent current
fs = 350 kHz,
fs = 550 kHz,
Phase pin open
Shutdown,
FSEL 0.8 V,
FSEL 2.5 V,
SS/ENA = 0 V
RT open
RT open,
3
6V
6.2 9.6
8.4 12.8 mA
1 1.4
UNDER VOLTAGE LOCK OUT
Start threshold voltage, UVLO
Stop threshold voltage, UVLO
Hysteresis voltage, UVLO
Rising and falling edge deglitch,
UVLO(1)
2.95
2.7 2.8
0.14
2.5
3
V
V
µs
BIAS VOLTAGE
Output voltage, VBIAS
Output current, VBIAS(2)
I(VBIAS) = 0
2.7 2.8 2.95 V
100 µA
OUTPUT VOLTAGE
VO Output voltage
TPS54311
TPS54312
TPS54313
TPS54314
TPS54315
TPS54316
TJ = 25°C,
3 VIN 6 V,
TJ = 25°C,
3 VIN 6 V,
TJ = 25°C,
3 VIN 6 V,
TJ = 25°C,
3 VIN 6 V,
TJ = 25°C,
3.2 VIN 6 V,
TJ = 25°C,
4 VIN 6 V,
VIN = 5 V
0 IL 3 A,
VIN = 5 V
0 IL 3 A,
VIN = 5 V
0 IL 3 A,
VIN = 5 V
0 IL 3 A,
VIN = 5 V
0 IL 3 A,
VIN = 5 V
0 IL 3 A,
0.9
V
−40 TJ 125 −2.5%
2.5%
1.2
V
−40 TJ 125 −2.5%
2.5%
1.5
V
−40 TJ 125 −2.5%
2.5%
1.8
V
−40 TJ 125 −2.5%
2.5%
2.5
V
−40 TJ 125 −2.5%
2.5%
3.3
V
−40 TJ 125 −2.5%
2.5%
REGULATION
Line regulation(1) (3)
Load regulation(1) (3)
(1) Specified by design
(2) Static resistive loads only
(3) Specified by the circuit used in Figure 10.
IL = 1.5 A,
IL = 0 A to 3 A,
350 fs 550 kHz, TJ = 85°C
350 fs 550 kHz, TJ = 85°C
0.21
%/V
0.21
%/A
3







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