BUS TRANSCEIVERS. 74ACT16245 Datasheet

74ACT16245 TRANSCEIVERS. Datasheet pdf. Equivalent

74ACT16245 Datasheet
Recommendation 74ACT16245 Datasheet
Part 74ACT16245
Description 16-BIT BUS TRANSCEIVERS
Feature 74ACT16245; SN54ACT16245, 74ACT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS097B – DECEMBER 1989 – REV.
Manufacture etcTI
Datasheet
Download 74ACT16245 Datasheet




Texas Instruments 74ACT16245
SN54ACT16245, 74ACT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS097B – DECEMBER 1989 – REVISED APRIL 1996
D Members of the Texas Instruments
WidebusFamily
D Inputs Are TTL-Voltage Compatible
D 3-State Outputs Drive Bus Lines Directly
D Flow-Through Architecture Optimizes PCB
Layout
D Distributed VCC and GND Configuration to
Minimize High-Speed Switching Noise
D EPIC (Enhanced-Performance Implanted
CMOS) 1-mm Process
D 500-mA Typical Latch-Up Immunity at
125°C
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings, Thin
Shrink Small-Outline (DGG) Packages, and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
description
The SN54ACT16245 and 74ACT16245 are 16-bit
bus transceivers organized as dual-octal
noninverting 3-state transceivers and designed
for asynchronous two-way communication
between data buses. The control-function
implementation minimizes external timing
requirements.
SN54ACT16245 . . . WD PACKAGE
74ACT16245 . . . DGG OR DL PACKAGE
(TOP VIEW)
1DIR 1
1B1 2
1B2 3
GND 4
1B3 5
1B4 6
VCC 7
1B5 8
1B6 9
GND 10
1B7 11
1B8 12
2B1 13
2B2 14
GND 15
2B3 16
2B4 17
VCC 18
2B5 19
2B6 20
GND 21
2B7 22
2B8 23
2DIR 24
48 1G
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
42 VCC
41 1A5
40 1A6
39 GND
38 1A7
37 1A8
36 2A1
35 2A2
34 GND
33 2A3
32 2A4
31 VCC
30 2A5
29 2A6
28 GND
27 2A7
26 2A8
25 2G
The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on
the logic level at the direction-control (DIR) input. The enable (G) input can be used to disable the devices so
that the buses are effectively isolated.
The SN54ACT16245 is characterized for operation over the full military temperature range of –55°C to 125°C.
The 74ACT16245 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
CONTROL
INPUTS
G DIR
OPERATION
L
L
B data to A bus
L
H A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1



Texas Instruments 74ACT16245
SN54ACT16245, 74ACT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS097B – DECEMBER 1989 – REVISED APRIL 1996
logic symbol
48
1G
1
1DIR
25
2G
24
2DIR
47
1A1
46
1A2
44
1A3
43
1A4
41
1A5
40
1A6
38
1A7
37
1A8
36
2A1
35
2A2
33
2A3
32
2A4
30
2A5
29
2A6
27
2A7
26
2A8
G3
3 EN1 [BA]
3 EN2 [AB]
G6
6 EN4 [BA]
6 EN5 [AB]
11
12
41
15
2
1B1
3
1B2
5
1B3
6
1B4
8
1B5
9
1B6
11
1B7
12
1B8
13
2B1
14
2B2
16
2B3
17
2B4
19
2B5
20
2B6
22
2B7
23
2B8
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
1
1DIR
47
1A1
48
1G
2
1B1
24
2DIR
36
2A1
25
2G
13
2B1
To Seven Other Transceivers
To Seven Other Transceivers
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Texas Instruments 74ACT16245
SN54ACT16245, 74ACT16245
16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS097B – DECEMBER 1989 – REVISED APRIL 1996
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DGG package . . . . . . . . . . . . . . . . 0.85 W
DL package . . . . . . . . . . . . . . . . . . . 1.2 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils.
recommended operating conditions (see Note 3)
SN54ACT16245 74ACT16245
UNIT
MIN MAX MIN MAX
VCC
VIH
VIL
VI
VO
IOH
IOL
t/v
Supply voltage (see Note 4)
High-level input voltage
Low-level input voltage
Input voltage
Output voltage
High-level output current
Low-level output current
Input transition rise or fall rate
4.5
5.5
2
0.8
0 VCC
0 VCC
–24
24
0
10
4.5 5.5 V
2
V
0.8 V
0 VCC V
0 VCC V
–24 mA
24 mA
0
10 ns/V
TA
Operating free-air temperature
–55
125 –40
85 °C
W NOTES: 3. Unused inputs should be tied to VCC through a pullup resistor of approximately 5 k or greater to keep them from floating.
4. All VCC and GND pins must be connected to the proper voltage power supply.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3







@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site (Privacy Policy & Contact)