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A/D Converter. ADC128S102QML-SP Datasheet

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A/D Converter. ADC128S102QML-SP Datasheet






ADC128S102QML-SP Converter. Datasheet pdf. Equivalent




ADC128S102QML-SP Converter. Datasheet pdf. Equivalent





Part

ADC128S102QML-SP

Description

Radiation Hardened 8-Channel A/D Converter



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity ADC128S102QML-SP SNAS411P – A UGUST 2008 – REVISED APRIL 2017 ADC12 8S102QML-SP Radiation Hardened 8-Channe l, 50 kSPS to 1 MSPS, 12-Bit A/D Conver ter 1 Features •1 5962R07227 – Tot al Ionizing Dose 100 krad(Si) – Singl e Event Latch-Up Immune 120 MeVcm2/mg Single Event Functional Int.
Manufacture

Texas Instruments

Datasheet
Download ADC128S102QML-SP Datasheet


Texas Instruments ADC128S102QML-SP

ADC128S102QML-SP; errupt Immune 120 MeV-cm2/mg (See Radiat ion Report) • Eight Input Channels Variable Power Management • Indepen dent Analog and Digital Supplies • SP I™/QSPI™/MICROWIRE™/DSP Compatibl e • Packaged in 16-Lead Ceramic SOIC • Key Specifications – Conversion R ate: 50 kSPS to 1 MSPS – DNL (VA = VD = 5 V): +1.5 / −0.9 LSB (Maximum) INL (VA = VD = 5 V): +1.4 / −1.25 LSB (Max.


Texas Instruments ADC128S102QML-SP

imum) – Power Consumption – 3-V Supp ly: 2.3 mW (Typical) – 5-V Supply: 10 .7 mW (Typical) 2 Applications • Sate llites – Attitude and Orbit Control Precision Sensors – Motor Control • High Temperature • Medical System s • Accelerators 3 Description The A DC128S102 device is a low-power, eightc hannel CMOS 12-bit analog-to-digital co nverter specified for conversion throu.


Texas Instruments ADC128S102QML-SP

ghput rates of 50 kSPS to 1 MSPS. The co nverter is based on a successiveapproxi mation register architecture with an in ternal track-and-hold circuit. The devi ce can be configured to accept up to ei ght input signals at inputs IN0 through IN7. The output serial data is straigh t binary and is compatible with several standards, such as SPI, QSPI, MICROWIR E, and many common.

Part

ADC128S102QML-SP

Description

Radiation Hardened 8-Channel A/D Converter



Feature


Product Folder Order Now Technical Doc uments Tools & Software Support & Com munity ADC128S102QML-SP SNAS411P – A UGUST 2008 – REVISED APRIL 2017 ADC12 8S102QML-SP Radiation Hardened 8-Channe l, 50 kSPS to 1 MSPS, 12-Bit A/D Conver ter 1 Features •1 5962R07227 – Tot al Ionizing Dose 100 krad(Si) – Singl e Event Latch-Up Immune 120 MeVcm2/mg Single Event Functional Int.
Manufacture

Texas Instruments

Datasheet
Download ADC128S102QML-SP Datasheet




 ADC128S102QML-SP
Product
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Software
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ADC128S102QML-SP
SNAS411P – AUGUST 2008 – REVISED APRIL 2017
ADC128S102QML-SP Radiation Hardened 8-Channel, 50 kSPS to 1 MSPS, 12-Bit A/D
Converter
1 Features
1 5962R07227
– Total Ionizing Dose 100 krad(Si)
– Single Event Latch-Up Immune 120 MeV-
cm2/mg
– Single Event Functional Interrupt Immune 120
MeV-cm2/mg
(See Radiation Report)
• Eight Input Channels
• Variable Power Management
• Independent Analog and Digital Supplies
• SPI™/QSPI™/MICROWIRE™/DSP Compatible
• Packaged in 16-Lead Ceramic SOIC
• Key Specifications
– Conversion Rate: 50 kSPS to 1 MSPS
– DNL (VA = VD = 5 V): +1.5 / 0.9 LSB
(Maximum)
– INL (VA = VD = 5 V): +1.4 / 1.25 LSB
(Maximum)
– Power Consumption
– 3-V Supply: 2.3 mW (Typical)
– 5-V Supply: 10.7 mW (Typical)
2 Applications
• Satellites
– Attitude and Orbit Control
– Precision Sensors
– Motor Control
• High Temperature
• Medical Systems
• Accelerators
3 Description
The ADC128S102 device is a low-power, eight-
channel CMOS 12-bit analog-to-digital converter
specified for conversion throughput rates of 50 kSPS
to 1 MSPS. The converter is based on a successive-
approximation register architecture with an internal
track-and-hold circuit. The device can be configured
to accept up to eight input signals at inputs IN0
through IN7.
The output serial data is straight binary and is
compatible with several standards, such as SPI,
QSPI, MICROWIRE, and many common DSP serial
interfaces.
The ADC128S102 may be operated with independent
analog and digital supplies. The analog supply (VA)
can range from 2.7 V to 5.25 V, and the digital supply
(VD) can range from 2.7 V to VA. Normal power
consumption using a 3-V or 5-V supply is 2.3 mW
and 10.7 mW, respectively. The power-down feature
reduces the power consumption to 0.06 µW using a
3-V supply and 0.25 µW using a 5-V supply.
Device Information(1)
PART NUMBER
GRADE
PACKAGE
ADC128S102WGRQV
5962R0722701VZA
100 krad
16-lead ceramic SOIC
ADC128S102WRQV
5962R0722701VFA
100 krad
16-lead ceramic flatpack
ADC128S102-MDR
5962R0722701V9A
100 krad
Die
Pre-Flight
ADC128S102WGMPR Engineering
Prototype
16-lead ceramic SOIC
ADC128S102CVAL
Ceramic Evaluation
Board
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Block Diagram
IN0
.
.
MUX
.
IN7
T/H
AGND
12-BIT
SUCCESSIVE
APPROXIMATION
ADC
VA
AGND
VD
ADC128S102
CONTROL
LOGIC
SCLK
CS
DIN
DOUT
DGND
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




 ADC128S102QML-SP
ADC128S102QML-SP
SNAS411P – AUGUST 2008 – REVISED APRIL 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 4
6 Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information .................................................. 6
6.5 Electrical Characteristics: ADC128S102QML-SP
Converter ................................................................... 6
6.6 Electrical Characteristics: Radiation ......................... 8
6.7 Electrical Characteristics: Burn in Delta Parameters -
TA at 25°C .................................................................. 9
6.8 Timing Requirements ................................................ 9
6.9 Typical Characteristics ............................................ 11
7 Detailed Description ............................................ 16
7.1 Overview ................................................................. 16
7.2 Functional Block Diagram ....................................... 16
7.3 Feature Description................................................. 16
7.4 Device Functional Modes........................................ 18
7.5 Programming........................................................... 19
8 Application and Implementation ........................ 21
8.1 Application Information............................................ 21
8.2 Typical Application ................................................. 21
9 Power Supply Recommendations...................... 23
9.1 Power Supply Sequence......................................... 23
9.2 Power Management ................................................ 23
9.3 Power Supply Noise Considerations....................... 23
10 Layout................................................................... 24
10.1 Layout Guidelines ................................................. 24
10.2 Layout Example .................................................... 24
11 Device and Documentation Support ................. 25
11.1 Device Support .................................................... 25
11.2 Receiving Notification of Documentation Updates 26
11.3 Community Resources.......................................... 26
11.4 Trademarks ........................................................... 26
11.5 Electrostatic Discharge Caution ............................ 26
11.6 Glossary ................................................................ 26
12 Mechanical, Packaging, and Orderable
Information ........................................................... 27
12.1 Engineering Samples ............................................ 27
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision O (November 2016) to Revision P
Page
• Changed feature link from 5962R07727 to 5962R07227....................................................................................................... 1
Changes from Revision N (September 2015) to Revision O
Page
• Changed the title of the ADC128S102QML-SP data sheet ................................................................................................... 1
• Added Radiation Report link to Features ............................................................................................................................... 1
• Changed Applications............................................................................................................................................................. 1
• Changed Device Information table ........................................................................................................................................ 1
• Added 14-pin CFP package option to the data sheet ........................................................................................................... 1
• Added TYPE column to the Pin Functions table ................................................................................................................... 4
• Added tablenote for digital supply voltage maximums allowed in the Absolute Maximum Ratings table .............................. 5
• Updated maximum tablenote for the digital supply voltage in the Absolute Maximum Ratings table.................................... 5
• Added tablenote for the voltage on any pin to GND maximums allowed in the Absolute Maximum Ratings table ............... 5
• Added links to the Quality Conformance Inspection table to the Electrical Characteristics tables ........................................ 6
• Added MIN and MAX test conditions for the SCLK duty cycle in the Electrical Characteristics: ADC128S102QML-SP
Converter table ....................................................................................................................................................................... 8
• Changed ADC128S102 Operational Timing Diagram image ............................................................................................... 10
• Changed first sentence and added MIL-STD-883G, Test Method 1019.7 link to the Total Ionizing Dose section.............. 18
• Changed total ionizing dose rate from 0.16 to 0.027 rad(Si)/s............................................................................................. 18
• Changed Single Event Latch-Up section to Single Event Latch-Up and Functional Interrupt ............................................. 18
• Added sentence to Serial Interface section: Note that CS is asynchronous. ....................................................................... 19
• Added Engineering Samples section.................................................................................................................................... 27
2
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Copyright © 2008–2017, Texas Instruments Incorporated
Product Folder Links: ADC128S102QML-SP




 ADC128S102QML-SP
www.ti.com
ADC128S102QML-SP
SNAS411P – AUGUST 2008 – REVISED APRIL 2017
Changes from Revision H (October 2009) to Revision N
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision G (October 2009) to Revision H
Page
• Added reference to Note 11. ................................................................................................................................................. 5
• Added Note:11........................................................................................................................................................................ 5
• Deleted 'TYPICAL' numbers from tDHID, tDS and tDIH ............................................................................................................... 6
• Changed Min limit on tDHID from 11 to 7. ............................................................................................................................... 6
Changes from Revision F (June 2009) to Revision G
Page
• Deleted reference to Ta Min and Ta Max under titled sections. ........................................................................................... 6
Changes from Revision E (April 2009) to Revision F
Page
• Changed AC Electrical Characteristics - SCLK Duty Cycle, typ limits .................................................................................. 8
Changes from Revision C (November 2008) to Revision D
Page
• Moved Rad information from Key Specifications to Features ................................................................................................ 1
• Deleted ADC128S102WGMLS reference .............................................................................................................................. 6
• Added Burn In Delta Table ..................................................................................................................................................... 9
Changes from Revision B (August 2008) to Revision C
Page
• Corrected package reference from 16-lead TSSOP to 16-lead Ceramic SOIC, Removed QV NSID reference and
Added SMD Number to RQV NSID in Features. ................................................................................................................... 1
Changes from Revision A (August 2008) to Revision B
Page
• Typo, Changed Figure 2, tDIS lower left hand side changed to tDS and tDIH lower left hand side change to tDH in
Timing Diagrams. ................................................................................................................................................................ 10
Copyright © 2008–2017, Texas Instruments Incorporated
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