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FET MULTIPLEXER/DEMULTIPLEXER. SN74CBT3257C Datasheet

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FET MULTIPLEXER/DEMULTIPLEXER. SN74CBT3257C Datasheet






SN74CBT3257C MULTIPLEXER/DEMULTIPLEXER. Datasheet pdf. Equivalent




SN74CBT3257C MULTIPLEXER/DEMULTIPLEXER. Datasheet pdf. Equivalent





Part

SN74CBT3257C

Description

4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER



Feature


SN74CBT3257C 4ĆBIT 1ĆOFĆ2 FET MULTIPL EXER/DEMULTIPLEXER 5ĆV BUS SWITCH WITH ć2ĆV UNDERSHOOT PROTECTION SCDS137 OCTOBER 2003 D Undershoot Protectio n for Off-Isolation on A and B Ports Up To −2 V D Bidirectional Data Flow, W ith Near-Zero Propagation Delay D Low O N-State Resistance (ron) Characteristic s (ron = 3 Ω Typical) D Low Input/Out put Capacitance Minimizes Load.
Manufacture

Texas Instruments

Datasheet
Download SN74CBT3257C Datasheet


Texas Instruments SN74CBT3257C

SN74CBT3257C; ing and Signal Distortion (Cio(OFF) = 5. 5 pF Typical) D Data and Control Inputs Provide Undershoot Clamp Diodes D Low Power Consumption (ICC = 3 µA Max) D V CC Operating Range From 4 V to 5.5 V D Data I/Os Support 0 to 5-V Signaling Le vels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V , 3.3-V, 5-V) D Control Inputs Can be D riven by TTL or 5-V/3.3-V CMOS Outputs D Ioff Supports Par.


Texas Instruments SN74CBT3257C

tial-Power-Down Mode Operation D Latch-U p Performance Exceeds 100 mA Per JESD 7 8, Class II D ESD Performance Tested Pe r JESD 22 − 2000-V Human-Body Model ( A114-B, Class II) − 1000-V Charged-De vice Model (C101) D Supports I2C Bus Ex pansion D Supports Both Digital and Ana log Applications: USB Interface, Bus Is olation, Low-Distortion Signal Gating GND D, DB, DBQ, OR PW.


Texas Instruments SN74CBT3257C

PACKAGE (TOP VIEW) S1 1B1 2 1B2 3 1A 4 2B1 5 2B2 6 2A 7 GND 8 16 VCC 15 OE 1 4 4B1 13 4B2 12 4A 11 3B1 10 3B2 9 3A RGY PACKAGE (TOP VIEW) VCC S 1 1B1 2 1B2 3 1A 4 2B1 5 2B2 6 2A 7 8 16 15 O E 14 4B1 13 4B2 12 4A 11 3B1 10 3B2 9 3A description/ordering information O RDERING INFORMATION TA PACKAGE† OR DERABLE PART NUMBER TOP-SIDE MARKING QFN − RGY Tape and .

Part

SN74CBT3257C

Description

4-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER



Feature


SN74CBT3257C 4ĆBIT 1ĆOFĆ2 FET MULTIPL EXER/DEMULTIPLEXER 5ĆV BUS SWITCH WITH ć2ĆV UNDERSHOOT PROTECTION SCDS137 OCTOBER 2003 D Undershoot Protectio n for Off-Isolation on A and B Ports Up To −2 V D Bidirectional Data Flow, W ith Near-Zero Propagation Delay D Low O N-State Resistance (ron) Characteristic s (ron = 3 Ω Typical) D Low Input/Out put Capacitance Minimizes Load.
Manufacture

Texas Instruments

Datasheet
Download SN74CBT3257C Datasheet




 SN74CBT3257C
SN74CBT3257C
4ĆBIT 1ĆOFĆ2 FET MULTIPLEXER/DEMULTIPLEXER
5ĆV BUS SWITCH WITH ć2ĆV UNDERSHOOT PROTECTION
SCDS137 − OCTOBER 2003
D Undershoot Protection for Off-Isolation on
A and B Ports Up To −2 V
D Bidirectional Data Flow, With Near-Zero
Propagation Delay
D Low ON-State Resistance (ron)
Characteristics (ron = 3 Typical)
D Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(Cio(OFF) = 5.5 pF Typical)
D Data and Control Inputs Provide
Undershoot Clamp Diodes
D Low Power Consumption
(ICC = 3 µA Max)
D VCC Operating Range From 4 V to 5.5 V
D Data I/Os Support 0 to 5-V Signaling Levels
(0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
D Control Inputs Can be Driven by TTL or
5-V/3.3-V CMOS Outputs
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
D Supports I2C Bus Expansion
D Supports Both Digital and Analog
Applications: USB Interface, Bus Isolation,
Low-Distortion Signal Gating
D, DB, DBQ, OR PW PACKAGE
(TOP VIEW)
S1
1B1 2
1B2 3
1A 4
2B1 5
2B2 6
2A 7
GND 8
16 VCC
15 OE
14 4B1
13 4B2
12 4A
11 3B1
10 3B2
9 3A
RGY PACKAGE
(TOP VIEW)
1
1B1 2
1B2 3
1A 4
2B1 5
2B2 6
2A 7
8
16
15 OE
14 4B1
13 4B2
12 4A
11 3B1
10 3B2
9
description/ordering information
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY
Tape and reel
SN74CBT3257CRGYR CU257C
SOIC − D
Tube
Tape and reel
SN74CBT3257CD
SN74CBT3257CDR
CBT3257C
−40°C to 85°C SSOP − DB
Tape and reel
SSOP (QSOP) − DBQ Tape and reel
SN74CBT3257CDBR CU257C
SN74CBT3257CDBQR CU257C
TSSOP − PW
Tube
Tape and reel
SN74CBT3257CPW
SN74CBT3257CPWR
CU257C
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
1




 SN74CBT3257C
SN74CBT3257C
4ĆBIT 1ĆOFĆ2 FET MULTIPLEXER/DEMULTIPLEXER
5ĆV BUS SWITCH WITH ć2ĆV UNDERSHOOT PROTECTION
SCDS137 − OCTOBER 2003
description/ordering information (continued)
The SN74CBT3257C is a high-speed TTL-compatible FET multiplexer/demultiplexer with low ON-state
resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and
B ports of the SN74CBT3257C provides protection for undershoot up to −2 V by sensing an undershoot event
and ensuring that the switch remains in the proper OFF state.
The SN74CBT3257C is a 4-bit 1-of-2 multiplexer/demultiplexer with a single output-enable (OE) input. The
select (S) input controls the data path of the multiplexer/demultiplexer. When OE is low, the
multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow
between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists
between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
INPUTS
OE S1
L
L
L
H
H
X
FUNCTION TABLE
INPUT/OUTPUT
A
FUNCTION
B1
A port = B1 port
B2
A port = B2 port
Z
Disconnect
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 SN74CBT3257C
logic diagram (positive logic)
4
1A
7
2A
9
3A
12
4A
SN74CBT3257C
4ĆBIT 1ĆOFĆ2 FET MULTIPLEXER/DEMULTIPLEXER
5ĆV BUS SWITCH WITH ć2ĆV UNDERSHOOT PROTECTION
SCDS137 − OCTOBER 2003
SW
SW
SW
SW
SW
SW
SW
SW
2
1B1
3
1B2
5
2B1
6
2B2
11
3B1
10
3B2
14
4B1
13
4B2
1
S
15
OE
simplified schematic, each FET switch (SW)
A
B
Undershoot
Protection Circuit
EN
EN is the internal enable signal applied to the switch.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3






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