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8-Bit DAC. TLV5626ID Datasheet

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8-Bit DAC. TLV5626ID Datasheet






TLV5626ID DAC. Datasheet pdf. Equivalent




TLV5626ID DAC. Datasheet pdf. Equivalent





Part

TLV5626ID

Description

Low Power Dual 8-Bit DAC



Feature


TLV5626 2.7-V TO 5.5-V LOW-POWER DUAL 8- BIT DIGITAL-TO-ANALOG CONVERTER WITH IN TERNAL REFERENCE AND POWER DOWN SLAS236 A –JUNE 1999 – REVISED JUNE 2000 f eatures D Dual 8-Bit Voltage Output DAC D Programmable Internal Reference D Pr ogrammable Settling Time: 0.8 µs in Fa st Mode , 2.8 µs in Slow Mode D Compat ible With TMS320 and SPI™ Serial Port s D Differential Nonlinear.
Manufacture

Texas Instruments

Datasheet
Download TLV5626ID Datasheet


Texas Instruments TLV5626ID

TLV5626ID; ity <0.1 LSB Typ D Monotonic Over Temper ature D PACKAGE (TOP VIEW) DIN 1 SCLK 2 CS 3 OUTA 4 8 VDD 7 OUTB 6 REF 5 AG ND applications D Digital Servo Contro l Loops D Digital Offset and Gain Adjus tment D Industrial Process Control D Ma chine and Motion Control Devices D Mass Storage Devices description The TLV56 26 is a dual 8-bit voltage output DAC w ith a flexible 3-w.


Texas Instruments TLV5626ID

ire serial interface.The serial interfac e allows glueless interface to TMS320 a nd SPI™, QSPI™, and Microwire™ se rial ports. It is programmed with a 16- bit serial string containing 2 control and 8 data bits. The resistor string ou tput voltage is buffered by a x2 gain r ail-to-rail output buffer. The buffer f eatures a Class AB output stage to impr ove stability and reduce.


Texas Instruments TLV5626ID

settling time. The programmable settlin g time of the DAC allows the designer t o optimize speed versus power dissipati on. With its on-chip programmable preci sion voltage reference, the TLV5626 sim plifies overall system design. Because of its ability to source up to 1 mA, th e reference can also be used as a syste m reference. Implemented with a CMOS pr ocess, the device .

Part

TLV5626ID

Description

Low Power Dual 8-Bit DAC



Feature


TLV5626 2.7-V TO 5.5-V LOW-POWER DUAL 8- BIT DIGITAL-TO-ANALOG CONVERTER WITH IN TERNAL REFERENCE AND POWER DOWN SLAS236 A –JUNE 1999 – REVISED JUNE 2000 f eatures D Dual 8-Bit Voltage Output DAC D Programmable Internal Reference D Pr ogrammable Settling Time: 0.8 µs in Fa st Mode , 2.8 µs in Slow Mode D Compat ible With TMS320 and SPI™ Serial Port s D Differential Nonlinear.
Manufacture

Texas Instruments

Datasheet
Download TLV5626ID Datasheet




 TLV5626ID
TLV5626
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS236A –JUNE 1999 – REVISED JUNE 2000
features
D Dual 8-Bit Voltage Output DAC
D Programmable Internal Reference
D Programmable Settling Time:
0.8 µs in Fast Mode ,
2.8 µs in Slow Mode
D Compatible With TMS320 and SPISerial
Ports
D Differential Nonlinearity <0.1 LSB Typ
D Monotonic Over Temperature
D PACKAGE
(TOP VIEW)
DIN 1
SCLK 2
CS 3
OUTA 4
8 VDD
7 OUTB
6 REF
5 AGND
applications
D Digital Servo Control Loops
D Digital Offset and Gain Adjustment
D Industrial Process Control
D Machine and Motion Control Devices
D Mass Storage Devices
description
The TLV5626 is a dual 8-bit voltage output DAC with a flexible 3-wire serial interface.The serial interface allows
glueless interface to TMS320 and SPI, QSPI, and Microwireserial ports. It is programmed with a 16-bit
serial string containing 2 control and 8 data bits.
The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class AB
output stage to improve stability and reduce settling time. The programmable settling time of the DAC allows
the designer to optimize speed versus power dissipation. With its on-chip programmable precision voltage
reference, the TLV5626 simplifies overall system design.
Because of its ability to source up to 1 mA, the reference can also be used as a system reference. Implemented
with a CMOS process, the device is designed for single supply operation from 2.7 V to 5.5 V. It is available in
an 8-pin SOIC package to reduce board space in standard commercial and industrial temperature ranges.
AVAILABLE OPTIONS
PACKAGE
TA
SOIC
(D)
0°C to 70°C
TLV5626CD
– 40°C to 85°C
TLV5626ID
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI and QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 1999, Texas Instruments Incorporated
1




 TLV5626ID
TLV5626
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS236A –JUNE 1999 – REVISED JUNE 2000
functional block diagram
REF AGND VDD
PGA With
Output Enable
Voltage
Bandgap
Power-On
Reset
Power
and Speed
Control
2
2
2-Bit
Control
Latch
x2
DIN
8
8-Bit
8
DAC A
SCLK
Serial
Interface
8
Latch
and
CS
Control
Buffer
8
8
8-Bit
DAC B
Latch
x2
OUTA
OUTB
TERMINAL
NAME
NO.
AGND
5
CS
3
DIN
1
OUTA
4
OUTB
7
REF
6
SCLK
2
VDD
8
Terminal Functions
I/O/P
DESCRIPTION
P Ground
I Chip select. Digital input active low, used to enable/disable inputs
I Digital serial data input
I DAC A analog voltage output
O DAC B analog voltage output
I/O Analog reference voltage input/output
I Digital serial clock input
P Positive power supply
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265




 TLV5626ID
TLV5626
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS236A –JUNE 1999 – REVISED JUNE 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (VDD to AGND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Reference input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VDD + 0.3 V
Digital input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to VDD + 0.3 V
Operating free-air temperature range, TA: TLV5626C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
TLV5626I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN NOM
MAX UNIT
Supply voltage, VDD
Power on threshold voltage, POR
VDD = 5 V
VDD = 3 V
4.5
5
5.5 V
2.7
3
3.3 V
0.55
2V
High-level digital input voltage, VIH
Low-level digital input voltage, VIL
Reference voltage, Vref to REF terminal
Reference voltage, Vref to REF terminal
Load resistance, RL
Load capacitance, CL
Clock frequency, fCLK
Operating free-air temperature, TA
VDD = 2.7 V to 5.5 V
VDD = 2.7 V to 5.5 V
VDD = 5 V (see Note 1)
VDD = 3 V (see Note 1)
TLV5626C
TLV5626I
2
AGND
AGND
2
0
–40
2.048
1.024
0.8
VDD –1.5
VDD – 1.5
100
20
70
85
V
V
V
V
k
pF
MHz
°C
NOTE 1: Due to the x2 output buffer, a reference input voltage (VDD – 0.4 V)/2 causes clipping of the transfer function. The output buffer of the
internal reference must be disabled, if an external reference is used.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3






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