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SN65LVDS16, SN65LVP16 SN65LVDS17, SN65LVP17
SLLS625B – SEPTEMBER 2004 – REVISED NOVEMBER 2005
2.5-V/3.3-V OSCILLATOR GAIN STAGE/BUFFERS
FEATURES
Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
Clock Rates to 2 GHz – 140-ps Output Transition Times – 0.11 ps Typical Intrinsic Phase Jitter – Less than 630 ps Propagation Delay Times
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