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State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up and Power Down
High-Drive Outputs (–32-mA IOH, 64-mA IOL) Package Options Include...
