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Quad Buffer. ACS125MS Datasheet

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Quad Buffer. ACS125MS Datasheet
















ACS125MS Buffer. Datasheet pdf. Equivalent













Part

ACS125MS

Description

Radiation Hardened Quad Buffer



Feature


ACS125MS January 1996 Radiation Hardene d Quad Buffer, Three-State Pinouts 14 P IN CERAMIC DUAL-IN-LINE MIL-STD-1835 DE SIGNATOR, CDIP2-T14, LEAD FINISH C TOP VIEW OE1 1 A1 2 Y1 3 OE2 4 A2 5 Y2 6 GN D 7 14 VCC 13 OE4 12 A4 11 Y4 10 OE3 9 A3 8 Y3 Features • Devices QML Quali fied in Accordance with MIL-PRF-38535 • Detailed Electrical and Screening R equirements are Containe.
Manufacture

Intersil Corporation

Datasheet
Download ACS125MS Datasheet


Intersil Corporation ACS125MS

ACS125MS; d in SMD# 5962-96705 and Intersil’s QM Plan • 1.25 Micron Radiation Hardene d SOS CMOS • Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si) • Single E vent Upset (SEU) Immunity: <1 x 10 (Typ ) -10 Errors/Bit/Day • SEU LET Thre shold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg • Dose R ate Upset . . . . . . . . . . .


Intersil Corporation ACS125MS

. . . . . . >1011 RAD (Si)/s, 20ns Pulse • Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Puls e • Latch-Up Free Under Any Condition s • Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC • Significant Power Reduction Compared to ALSTTL Logic • DC Operat ing Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5.


Intersil Corporation ACS125MS

V • Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min • Inpu t Current ≤ 1µA at VOL, VOH • Fast Propagation Delay . . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ) 14 PIN CERAMIC FLATPACK MIL-STD-1835 DESIG NATOR, CDFP3-F14 LEAD FINISH C TOP VIEW OE1 A1 Y1 OE2 A2 Y2 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC OE4 A4 Y4 OE3 A3 Y3 Description The Inters.





Part

ACS125MS

Description

Radiation Hardened Quad Buffer



Feature


ACS125MS January 1996 Radiation Hardene d Quad Buffer, Three-State Pinouts 14 P IN CERAMIC DUAL-IN-LINE MIL-STD-1835 DE SIGNATOR, CDIP2-T14, LEAD FINISH C TOP VIEW OE1 1 A1 2 Y1 3 OE2 4 A2 5 Y2 6 GN D 7 14 VCC 13 OE4 12 A4 11 Y4 10 OE3 9 A3 8 Y3 Features • Devices QML Quali fied in Accordance with MIL-PRF-38535 • Detailed Electrical and Screening R equirements are Containe.
Manufacture

Intersil Corporation

Datasheet
Download ACS125MS Datasheet




 ACS125MS
ACS125MS
January 1996
Radiation Hardened
Quad Buffer, Three-State
Features
Pinouts
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96705 and Intersil’s QM Plan
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day
(Typ)
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse
• Dose Rate Survivability . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC
14 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR, CDIP2-T14,
LEAD FINISH C
TOP VIEW
OE1 1
A1 2
Y1 3
OE2 4
A2 5
Y2 6
GND 7
14 VCC
13 OE4
12 A4
11 Y4
10 OE3
9 A3
8 Y3
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current 1µA at VOL, VOH
• Fast Propagation Delay . . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ)
Description
The Intersil ACS125MS is a Radiation Hardened Quad Buffer with
Three-State outputs. Each output has it’s own enable input, which when
“HIGH” puts the output in a high impedance state.
14 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR, CDFP3-F14
LEAD FINISH C
TOP VIEW
OE1
A1
Y1
OE2
A2
Y2
GND
1 14
2 13
3 12
4 11
5 10
69
78
VCC
OE4
A4
Y4
OE3
A3
Y3
The ACS125MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of radiation hardened,
high-speed, CMOS/SOS Logic Family.
The ACS125MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
Ordering Information
PART NUMBER
5962F9670501VCC
5962F9670501VXC
ACS125D/Sample
ACS125K/Sample
ACS125HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
25oC
25oC
25oC
SCREENING LEVEL
MIL-PRF-38535 Class V
MIL-PRF-38535 Class V
Sample
Sample
Die
PACKAGE
14 Lead SBDIP
14 Lead Ceramic Flatpack
14 Lead SBDIP
14 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
Spec Number 518817
File Number 3565.1




 ACS125MS
Functional Diagram
An
OEn
ACS125MS
P
Yn
n
TRUTH TABLE
INPUTS
OUTPUT
An OEn Yn
LLL
HLH
XHZ
NOTE: L = Low, H = High, X = Don’t Care, Z = High Impedance
Spec Number 518817
2




 ACS125MS
Die Characteristics
DIE DIMENSIONS:
88 mils x 88 mils
2.24mm x 2.24mm
METALLIZATION:
Type: AlSi
Metal 1 Thickness: 7.125kÅ ±1.125kÅ
Metal 2 Thickness: 9kÅ ±1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 8kÅ ±1kÅ
WORST CASE CURRENT DENSITY:
<2.0 x 105 A/cm2
BOND PAD SIZE:
> 4.3 mils x 4.3 mils
> 110µm x 110µm
Metallization Mask Layout
ACS125MS
ACS125MS
A1 OE1 VCC OE4
(2) (1) (14) (13)
Y1 (3)
OE2 (4)
NC
A2 (5)
(12) A4
(11) Y4
NC
(10) OE3
(6) (7) (8)
Y2 GND Y3
(9)
A3
3
Spec Number 518817




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