Drain Outputs. HV5222 Datasheet
32-Channel Serial To Parallel Converter
With Open Drain Outputs
44 J-Lead Quad
44 J-Lead Quad
Ceramic Chip Carrier Plastic Chip Carrier
44 Lead Quad
■ Processed with HVCMOS® technology
■ Output voltages to 225V using a ramped supply voltage
■ Sink current minimum 100mA
■ Shift register speed 8MHz
■ Strobe and enable inputs
■ CMOS compatible inputs
■ Forward and reverse shifting options
■ 44-lead ceramic surface mount package
■ Hi-Rel processing available
Absolute Maximum Ratings1
Supply voltage, VDD
Output voltage, VPP
Logic input levels
-0.5V to +15V
-0.5V to +250V
-0.5V to VDD + 0.5V
Continuous total power dissipation3 Plastic
Operating temperature range
Plastic -40°C to +85°C
Ceramic -55 to +125°C
Storage temperature range
-65°C to +150°C
Lead temperature 1.6mm (1/16 inch)
from case for 10 seconds
1. All voltages are referenced to GND.
2. Duty cycle is limited by the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to maximum operating
temperature at 20mW/°C for plasitc and at 15mW/°C for ceramic.
The HV51 and HV52 are low voltage serial to high voltage parallel
converters with open drain outputs. These devices have been
designed for use as drivers for AC electroluminescent displays.
They can also be used in any application requiring multiple output
high voltage current sinking capabilities such as driving inkjet and
electrostatic print heads, plasma panels, vacuum fluorescent, or
large matrix LCD displays.
These devices consist of a 32-bit shift register and control logic to
perform the Output Enable and All-ON functions. Data is shifted
through the shift register on the high to low transition of the clock.
The HV51 shifts in the counterclockwise direction when viewed
from the top of the package and the HV52 shifts in the clockwise
direction. A data output buffer is provided for cascading devices.
This output reflects the current status of the last bit of the shift
register. Operation of the shift register is not affected by the OE
(Output Enable) or the STR (Strobe) inputs.
The HV51 and HV52 have been designed to be used in systems
which either switch off the high voltage supply before changing
the state of the high voltage outputs or which limit the current
through each output.
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex prod1ucts, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Electrical Characteristics (over recommended operating conditions unless noted)
Min Typ Max Units
IDD VDD supply current
Quiescent VDD supply current
Off state output current
IIH High-level logic input current
IIL Low-level logic input current
VOH High-level output data out
VDD - 1.0V
Low-level output voltage
VOC HVOUT Clamp Voltage
fCLK = 8MHz
FDATA = 4MHz
All VIN = 0V
All outputs high
All SWS parallel
VIH = 12V
VIL = 0V
IDout = -100µA
IHVout = +100mA
IDout = +100µA
IOL = -100mA
AC Characteristics (VDD = 12V, TC = 25°C)
fCLK Clock frequency
tW Clock width high or low
tSU Data set-up time before clock falls
tH Data hold time after clock falls
tON Turn ON time, HVOUT from strobe
tDHL Delay time clock to data high to low
tDLH Delay time clock to data low to high
Min Typ Max Units Conditions
500 ns RL = 2KΩ to 200V
100 ns CL = 15pF
100 ns CL = 15pF
Recommended Operating Conditions
Logic supply voltage
High voltage output
High-level input voltage
Low-level input voltage
Operating free-air temperature
Power-up sequence should be the following:
1. Connect ground.
2. Apply VDD.
3. Connect all inputs to a known state.
Power-down sequence should be the reverse of the above.
VDD - 2V