Parallel Converter. HV5530 Datasheet

HV5530 Converter. Datasheet pdf. Equivalent

Part HV5530
Description 32-Channel Serial to Parallel Converter
Feature Supertex inc. 32-Channel Serial to Parallel Converter With Open Drain Outputs HV5530 Features ►►Pr.
Manufacture Supertex Inc
Datasheet
Download HV5530 Datasheet




HV5530
Supertex inc.
32-Channel Serial to Parallel Converter
With Open Drain Outputs
HV5530
Features
►Processed with HVCMOS® technology
►Sink current minimum 100mA
►Shift register speed 8.0MHz
►Polarity and Blanking inputs
►CMOS compatible inputs
►Forward and reverse shifting options
Diode to VPP allows efficient power recovery
General Description
The HV5530 is a low-voltage serial to high-voltage parallel
converter with open drain outputs. This device has been designed
for use as a driver for AC-electroluminescent displays. It can also
be used in any application requiring multiple output high voltage
current sinking capabilities such as driving inkjet and electrostatic
print heads, plasma panels, vacuum fluorescent, or large matrix
LCD displays.
This device consists of a 32-bit shift register, 32 latches, and
control logic to perform the polarity select and blanking of the
outputs. Data is shifted through the shift register on the high to low
transition of the clock. The HV5530 shifts in the counter clockwise
direction when viewed from the top of the package. A data output
buffer is provided for cascading devices. This output reflects the
current status of the last bit of the shift register. Operation of the
shift register is not affected by the LE (latch enable), BL (blanking),
or the POL (polarity) inputs. Transfer of data from the shift register
to the latch occurs when the LE (latch enable) input is high. The
data in the latch is stored when LE is low.
Functional Block Diagram
POL
BL
LE
DATA
IN
CLK
32-Bit
Shift
Register
DATA
OUT
Latch
Latch
Latch
Latch
HVOUT1
HVOUT2
(Outputs 3 to 30 not shown)
HVOUT31
HVOUT32
Doc.# DSFP-HV5530
C072313
Supertex inc.
www.supertex.com



HV5530
HV5530
Ordering Information
Pin Configuration
Part Number
Package
Packing
HV5530PG-G
44-Lead PQFP
HV5530PG-G M919 44-Lead PQFP
HV5530PJ-G
44-Lead PLCC
HV5530PJ-G M903 44-Lead PLCC
-G denotes a lead (Pb)-free / RoHS compliant package
96/Tray
500/Reel
27/Tube
500/Reel
44
1
Absolute Maximum Ratings
44-Lead PQFP
(top view)
Parameter
Supply voltage, VDD1
Output voltage, VPP1
Logic input levels1
Ground current2
Value
-0.5V to +15V
-0.5V to +315V
-0.5V to VDD +0.5V
1.5A
6 1 44 40
Continuous total power dissipation3
Operating temperature range
1200mW
-40OC to +85OC
44-Lead PLCC
(top view)
Storage temperature range
-65OC to +150OC
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device at
the absolute rating level may affect device reliability. All voltages are referenced to device ground.
Notes:
1.
2.
All voltages are referenced
Duty cycle is limited by the
ttootaVlSpSower
dissipated
in
the
package
3. For operation above 25°C ambient derate linearly to maximum operating
temperature at 20mW/°C.
Recommended Operating Conditions
Sym Parameter
Min Max Units
VDD
HVOUT
VIH
VIL
fCLK
TA
Logic voltage supply
High voltage output
Input high voltage
Input low voltage
Clock frequency
Operating free-air temperature
10.8
-0.3
VDD -2.0
0
-
-40
13.2
+300
VDD
2.0
8.0
+85
V
V
V
V
MHz
OC
Power-Up Sequence
Power-up sequence should be the following:
1. Connect ground
2. Apply VDD
3. Set all inputs to a known state
Power-down sequence should be the reverse of the above.
Product Marking
Top Marking
YYWW
HV5530PG
LLLLLLLLL
Bottom Marking
CCCCCCCC
AAA
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
44-Lead PQFP
Top Marking
YY = Year Sealed
YYWW AAA
HV5530PJ
WW = Week Sealed
LLLLLLLLLL L = Lot Number
Bottom
Marking
A
C
=
=
Assembler
Country of
ID
Origin*
= “Green” Packaging
CCCCCCCCCCC *May be part of top marking
Package may or may not include the following marks: Si or
44-Lead PLCC
Typical Thermal Resistance
Package
θja
44-Lead PQFP
51OC/W
44-Lead PLCC
37OC/W
Doc.# DSFP-HV5530
C072313
Supertex inc.
2 www.supertex.com







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