Express Microcontroller. HS9-RTX2010RH-Q Datasheet

HS9-RTX2010RH-Q Microcontroller. Datasheet pdf. Equivalent

Part HS9-RTX2010RH-Q
Description Radiation Hardened Real Time Express Microcontroller
Feature HS-RTX2010RH Data Sheet March 2000 File Number 3961.3 Radiation Hardened Real Time Express™ Microco.
Manufacture Intersil Corporation
Datasheet
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HS9-RTX2010RH-Q
Data Sheet
HS-RTX2010RH
March 2000
File Number 3961.3
Radiation Hardened Real Time Express™
Microcontroller
The HS-RTX2010RH is a radiation-hardened 16-bit
microcontroller with on-chip timers, an interrupt controller, a
multiply-accumulator, and a barrel shifter. It is particularly
well suited for space craft environments where very high
speed control tasks which require arithmetically intensive
calculations, including floating point math to be performed in
hostile space radiation environments.
This processor incorporates two 256-word stacks with
multitasking capabilities, including configurable stack
partitioning and over/underflow control.
Instruction execution times of one or two machine cycles are
achieved by utilizing a stack oriented, multiple bus
architecture. The high performance ASIC Bus, which is
unique to the RTX product, provides for extension of the
microcontroller architecture using off-chip hardware and
application specific I/O devices.
RTX Microcontrollers support the C and Forth programming
languages. The advantages of this product are further
enhanced through third party hardware and software support.
Combined, these features make the HS-RTX2010RH an
extremely powerful processor serving numerous
applications in high performance space systems. The
HS-RTX2010RH has been designed for harsh space
radiation environments and features outstanding Single
Event Upset (SEU) resistance and excellent total dose
response.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-95635. A “hot-link” is provided
on our homepage for downloading.
www.intersil.com/spacedefense/space.asp
Ordering Information
ORDERING NUMBER
INTERNAL
MKT. NUMBER
TEMP. RANGE
(oC)
5962F9563501QXC HS8-RTX2010RH-8
55 to 125
5962F9563501QYC HS9-RTX2010RH-8
55 to 125
5962F9563501V9A HS0-RTX2010RH-Q
25
5962F9563501VXC HS8-RTX2010RH-Q
55 to 125
5962F9563501VYC HS9-RTX2010RH-Q
55 to 125
HS8-RTX2010RH/Proto HS8-RTX2010RH/Proto 55 to 125
HS9-RTX2010RH/Proto HS9-RTX2010RH/Proto 55 to 125
Features
• Electrically Screened to SMD # 5962-95635
• QML Qualified per MIL-PRF-38535 Requirements
• Fast 125ns Machine Cycle
• 1.2µM TSOS4 CMOS/SOS Process
• Total Dose Capability . . . . . . . . . . . . . . . . . . 300KRad(Si)
• Single Event Upset Critical LET . . . . . . . >120MeV/mg/cm2
• Single Event Upset Error Rate . . . . <1 x 10-10 Errors/Bit-Day
(Note)
• -55oC - 125oC, 5V ±10% Operation
• Single Cycle Instruction Execution
• Fast Arithmetic Operations
- Single Cycle 16-Bit Multiply
- Single Cycle 16-Bit Multiply Accumulate
- Single Cycle 32-Bit Barrel Shift
- Hardware Floating Point Support
• C Software Development Environment
• Direct Execution of Fourth Language
• Single Cycle Subroutine Call/Return
• Four Cycle Interrupt Latency
• On-Chip Interrupt Controller
• Three On-Chip 16-Bit Timer/Counters
• Two On-Chip 256 Word Stacks
• ASIC Bus™ for Off-Chip Architecture Extension
• 1 Megabyte Total Address Space
• Word and Byte Memory Access
• Fully Static Design - DC to 8MHz Operation
• 84 Lead Quad Flat Package or 85 Pin Grid Array
• Third Party Software and Hardware Development Systems
NOTE: Single Event Upset error rates are Adams 10% worst case
environment under worst case conditions for upset.
Applications
• Space Systems Embedded Control
• Digital Filtering
• Image Processing
• Scientific Instrumentation
• Optical Systems
• Control Systems
• Attitude/Orbital Control
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000
Real Time Express™, RTX™, and ASIC Bus™ are trademarks of Intersil Corporation.



HS9-RTX2010RH-Q
Block Diagram
CONTROL
INPUTS
INTERRUPT
INPUTS
TIMER
INPUTS
HS-RTX2010RH
OFF CHIP
PERIPHERALS
MAIN
MEMORY
CLOCK AND
CONFIGURATION
CONTROL
INTERRUPT
CONTROL
TIMER/
COUNTERS
BARREL
SHIFTER
ASIC BUS
INTERFACE
MEMORY BUS
INTERFACE
HS-RTX2010RH
MEMORY
PAGE
CONTROL
RTX CORE
PROCESSOR
MAC
256-WORD
RETURN
STACK
256-WORD
PARAMETER
STACK
STACK
CONTROLLERS
Pinouts
HS8-RTX2010RH
MIL-STD-1835 CMGA3-P85C
A B CDE F GH J K L
11 MD08 MD07 MD06 GND MD02 MD01 PCLK UDS GND MA19 MA16
10 MD11 MD09 VDD MD05 MD03 NEW BOOT LDS MA18 MA17 MA14
9 MD12 MD10
MD04 MD00 MR/W
MA15 VDD
8 MD14 MD13
7 GA00 MD15 GA01
6 TCLK GND GA02
5 INTA
NMI
INT-
SUP
4 VDD E I1
HS-RTX2010RH
TOP VIEW
PINS DOWN
MA13 MA12
GND MA10 MA09
MA08 MA07 MA11
MA04 MA05 MA06
MA02 MA03
3 E I2 E I4
GD14 GD11 GD10
GD01 MA01
2 E I3 RESET WAIT GIO GD13 GD12 GD08 GD06 GD03 GD02 GD00
1 E I5 ICLK GR/W GD15 GND GD07 GD09 VDD GD05 GD04 GND
L K J H G F E D C BA
11
MA16 MA19 GND UDS PCLK MD01 MD02 GND MD06 MD07 MD08
10
MA14 MA17 MA18 LDS BOOT NEW MD03 MD05 VDD MD09 MD11
9
VDD MA15
MR/W MD00 MD04
MD10 MD12
8
MA12 MA13
MD13 MD14
7
MA09 MA10 GND
BOTTOM VIEW
GA01 MD15 GA00
6
MA11 MA07 MA08
PINS UP
GA02 GND TCLK
5
MA06 MA05 MA04
MA03 MA02
MA01 GD01
GD10 GD11 GD14
INTSUP NMI INTA
ALIGN.
PIN
E I1
VDD
4
3
E I4 E I2
2
GD00 GD02 GD03 GD06 GD08 GD12 GD13 GIO WAIT RESET E I3
GND GD04 GD05 VDD GD09 GD07 GND GD15 GR/W ICLK E I5
1
A B CDE F GH J K L
L K J H G F E D C BA
PIN PIN
A1 A1
NOTE: An overbar on a signal name represents an active LOW signal.
2





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