CMOS RAM. HM-6504883 Datasheet

HM-6504883 RAM. Datasheet pdf. Equivalent

HM-6504883 Datasheet
Recommendation HM-6504883 Datasheet
Part HM-6504883
Description 4096 x 1 CMOS RAM
Feature HM-6504883; HM-6504/883 March 1997 4096 x 1 CMOS RAM Description The HM-6504/883 is a 4096 x 1 static CMOS RAM .
Manufacture Intersil Corporation
Datasheet
Download HM-6504883 Datasheet




Intersil Corporation HM-6504883
HM-6504/883
March 1997
4096 x 1 CMOS RAM
Features
Description
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Low Power Standby . . . . . . . . . . . . . . . . . . . 125µW Max
• Low Power Operation . . . . . . . . . . . . . 35mW/MHz Max
• Data Retention . . . . . . . . . . . . . . . . . . . . . . . at 2.0V Min
• TTL Compatible Input/Output
• Three-State Output
• Standard JEDEC Pinout
• Fast Access Time. . . . . . . . . . . . . . . . . . 120/200ns Max
• 18 Pin Package for High Density
• On-Chip Address Register
The HM-6504/883 is a 4096 x 1 static CMOS RAM
fabricated using self-aligned silicon gate technology. The
device utilizes synchronous circuitry to achieve high perfor-
mance and low power operation.
On-chip latches are provided for addresses, data input and
data output allowing efficient interfacing with microprocessor
systems. The data output can be forced to a high impedance
state for use in expanded memory arrays.
Gated inputs allow lower operating current and also elimi-
nate the need for pull up or pull down resistors. The
HM-6504/883 is a fully static RAM and may be maintained in
any state for an indefinite period of time.
Data retention supply voltage and supply current are guaran-
teed over temperature.
• Gated Inputs - No Pull Up or Pull Down Resistors
Required
Ordering Information
PACKAGE TEMPERATURE RANGE
200ns
CERDIP
-55oC to +125oC
HM1-6504B/883
300ns
HM1-6504/883
PKG. NO
F18.3
Pinout
HM-6504/883 (CERDIP)
TOP VIEW
A0 1
A1 2
A2 3
A3 4
A4 5
A5 6
Q7
W8
GND 9
18 VCC
17 A6
16 A7
15 A8
14 A9
13 A10
12 A11
11 D
10 E
PIN DESCRIPTION
A Address Input
E Chip Enable
W Write Enable
D Data Input
Q Data Output
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
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File Number 2993.1



Intersil Corporation HM-6504883
Functional Diagram
HM-6504/883
LSB
A8
A7
A6
A0
A1
A2
D
W
E
LATCHED
ADDRESS
REGISTER
L
A
6
A
6
GATED
ROW
DECODER
G
D LATCH Q
DQ
LATCH
L
L
L
DQ
LATCH
64 x 64
64 MATRIX
64
G
GATED COLUMN D
Q
A
DECODER AND
DATA I/O
LATCH
L
66
AA
L LATCHED
ADDRESS
REGISTER
Q
A
LSB A11 A5 A4 A3 A9 A10
NOTES:
1. All lines active high-positive logic.
2. Three-state Buffers: A high output active.
3. Control and Data Latches: L low Q = D and Q latches on rising edge of L.
4. Address Latches: Latch on falling edge of E.
5. Gated Decoders: Gate on rising edge of G.
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Intersil Corporation HM-6504883
HM-6504/883
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance
θJA
CERDIP Package . . . . . . . . . . . . . . . . 75oC/W
θJC
15oC/W
Maximum Storage Temperature Range . . . . . . . . .-65oC to +150oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6910 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +0.8V
Input High Voltage . . . . . . . . . . . . . . . . . . . VCC -2.0V to VCC +0.3V
TABLE 1. HM-6504/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTE 1)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
MIN MAX UNITS
Output Low Voltage
Output High Voltage
Input Leakage Current
Output Leakage Current
Data Retention Supply Current
Operating Supply Current
Standby Supply Current
VOL
VOH
II
IOZ
ICCDR
ICCOP
ICCSB
VCC = 4.5V,
IOL = 2mA
VCC = 4.5V,
IOH = -1.0mA
VCC = 5.5V,
VI = GND or VCC
VCC = 5.5V,
VO = GND or VCC
VCC = 2.0V,
E = VCC,
IO = 0mA
VCC = 5.5V,
(Note 2),
E = 1MHz,
IO = 0mA
VCC = 5.0V,
E = VCC -0.3V,
IO = 0mA
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
-55oC TA +125oC
-
0.4
-55oC TA +125oC 2.4
-
-55oC TA +125oC -1.0 +1.0
-55oC TA +125oC -1.0 +1.0
-55oC TA +125oC
-55oC TA +125oC
-
-
25
7
V
V
µA
µA
µA
mA
-55oC TA +125oC
-
50
µA
NOTES:
1. All voltage referenced to device GND.
2. Typical derating 1.5mA/MHz increase in ICCOP.
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