CMOS PROM. HM1-6617B883 Datasheet

HM1-6617B883 PROM. Datasheet pdf. Equivalent


Intersil Corporation HM1-6617B883
HM-6617/883
March 1997
2K x 8 CMOS PROM
Features
Description
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Low Power Standby and Operating Power
- ICCSB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100µA
- ICCOP . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA at 1MHz
• Fast Access Time. . . . . . . . . . . . . . . . . . . . . . . 90/120ns
• Industry Standard Pinout
• Single 5.0V Supply
• CMOS/TTL Compatible Inputs
• High Output Drive . . . . . . . . . . . . . . . . 12 LSTTL Loads
• Synchronous Operation
• On-Chip Address Latches
• Separate Output Enable
• Operating Temperature Range . . . . . . -55oC to +125oC
The HM-6617/883 is a 16,384-bit fuse link CMOS PROM in
a 2K word by 8-bit/word format with “Three-State” outputs.
This PROM is available in the standard 0.600 inch wide 24
pin SBDIP, the 0.300 inch wide slim SBDIP, and the JEDEC
standard 32 pad CLCC.
The HM-6617/883 utilizes a synchronous design technique.
This includes on-chip address latches and a separate output
enable control which makes this device ideal for applications
utilizing recent generation microprocessors. This design
technique, combined with the Intersil advanced self-aligned
silicon gate CMOS process technology offers ultra-low
standby current. Low ICCSB is ideal for battery applications
or other systems with low power requirements.
The Intersil NiCr fuse link technology is utilized on this and
other Intersil CMOS PROMs. This gives the user a PROM
with permanent, stable storage characteristics over the full
industrial and military temperature voltage ranges. NiCr fuse
technology combined with the low power characteristics of
CMOS provides an excellent alternative to standard bipolar
PROMs or NMOS EPROMs.
Ordering Information
All bits are manufactured storing a logical “0” and can be
selectively programmed for a logical “1” at any bit location.
PACKAGE
SBDIP
SLIM SBDIP
CLCC
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
90ns
HM1-6617B/883
HM6-6617B/883
HM4-6617B/883
120ns
HM1-6617B/883
HM6-6617B/883
HM4-6617B/883
PACKAGE NO.
D24.6
D24.3
J32.A
Pinouts
HM-6617/883 (SBDIP)
TOP VIEW
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
Q0 9
Q1 10
Q2 11
GND 12
24 VCC
23 A8
22 A9
21 P
20 G
19 A10
18 E
17 Q7
16 Q6
15 Q5
14 Q4
13 Q3
HM-6617/883 (CLCC)
TOP VIEW
4 3 2 1 32 31 30
A6 5
29 A8
A5 6
28 A9
A4 7
27 NC
A3 8
26 P
A2 9
25 G
A1 10
24 A10
A0 11
23 E
NC 12
22 Q7
Q0 13
21 Q6
14 15 16 17 18 19 20
PIN DESCRIPTION
PIN DESCRIPTION
NC No Connect
A0-A10
Address Inputs
E Chip Enable
Q Data Output
VCC
G
Power (+5V)
Output Enable
P (Note) Program Enable
NOTE: P should be hardwired to VCC
except during programming.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-250
File Number 3016.1


HM1-6617B883 Datasheet
Recommendation HM1-6617B883 Datasheet
Part HM1-6617B883
Description 2K x 8 CMOS PROM
Feature HM1-6617B883; HM-6617/883 March 1997 2K x 8 CMOS PROM Description The HM-6617/883 is a 16,384-bit fuse link CMOS .
Manufacture Intersil Corporation
Datasheet
Download HM1-6617B883 Datasheet




Intersil Corporation HM1-6617B883
HM-6617/883
Functional Diagram
MSB
A10
A9
A8
A7
A6
A5
A4
LSB
LATCHED
ADDRESS
REGISTER
A
7
A
7
L
GATED
ROW
DECODER
G
E
G
ALL LINES POSITIVE LOGIC: ACTIVE HIGH
THREE-STATE BUFFERS:
A HIGH
OUTPUT ACTIVE
ADDRESS LATCHES AND GATED DECODERS:
LATCH ON FALLING EDGE OF E
GATE ON FALLING EDGE OF G
128 x 128
128 MATRIX
16 16 16 16 16 16 16 16
G GATED COLUMN
DECODER AND DATA
OUTPUT CONTROL
8
A
4
A
4
L LATCHED ADDRESS
REGISTER
MSB
LSB
A3 A2 A1 A0
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
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Intersil Corporation HM1-6617B883
HM-6617/883
Absolute Maximum Ratings
Thermal Information
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
Typical Derating Factor . . . . . . . . . . . . 5mA/MHz Increase in ICCOP
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC
Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.8V
Input High Voltage . . . . . . . . . . . . . . . . . . . . . . +2.4V to VCC +0.3V
Thermal Resistance
SBDIP Package . . . . . . . . . . . . . . . . . .
48θoJCA/W
9oθCJC/W
Slim SBDIP . . . . . . . . . . . . . . . . . . . . . 65oC/W
14oC/W
CLCC Package . . . . . . . . . . . . . . . . . . 58oC/W
19oC/W
Maximum Storage Temperature Range . . . . . . . . .-65oC to +150oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +175oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5473 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
TABLE 1. HM-6617/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTES 1, 4)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
MIN MAX
High Level Output Voltage VOH1 VCC = 4.5V, IO = -2.0mA
1, 2, 3
-55oC TA +125oC 2.4
-
Low Level Output Voltage VOL VCC = 4.5V, IO = +4.8mA
1, 2, 3
-55oC TA +125oC
-
0.4
High Impedance Output
Leakage Current
IIOZ VCC = 5.5V, G = 5.5V,
VI/O = GND or VCC
1, 2, 3
-55oC TA +125oC -1.0
1.0
Input Leakage Current
II VCC = 5.5V, VI = GND or
VCC, P Not Tested
1, 2, 3
-55oC TA +125oC -1.0
1.0
Standby Supply Current
ICCSB VI = VCC or GND,
VCC = 5.5V, IO = 0mA
1, 2, 3
-55oC TA +125oC
-
100
Operating Supply Current
ICCOP
VCC = 5.5V, G = GND,
(Note 3), f = 1MHz, IO =
0mA, VI = VCC or GND
1, 2, 3
-55oC TA +125oC
-
20
Functional Test
FT VCC = 4.5V (Note 6)
7, 8A, 8B -55oC TA +125oC
-
-
UNITS
V
V
µA
µA
µA
mA
TABLE 2. HM-6617/883 AC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
SYMBOL
(NOTES 1, 2, 4)
CONDITIONS
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
LIMITS
HM-6617B/883 HM-6617/883
MIN MAX MIN MAX UNITS
Address Access Time TAVQV VCC = 4.5V and 5.5V
9, 10, 11
-55oC TA +125oC
-
105
-
140 ns
(Note 5)
Output Enable Access TGLQV VCC = 4.5V and 5.5V
9, 10, 11
-55oC TA +125oC
-
40
-
50 ns
Time
Chip Enable Access
TELQV VCC = 4.5V and 5.5V
9, 10, 11
-55oC TA +125oC
-
90
- 120 ns
Time
Address Setup Time
TAVEL VCC = 4.5V and 5.5V
9, 10, 11
-55oC TA +125oC 15
-
20
-
ns
Address Hold Time
TELAX VCC = 4.5V and 5.5V
9, 10, 11
-55oC TA +125oC 20
-
25
-
ns
Chip Enable Low Width TELEH VCC = 4.5V and 5.5V
9, 10, 11
-55oC TA +125oC 95
- 120 -
ns
Chip Enable High Width TEHEL VCC = 4.5V and 5.5V
9, 10, 11
-55oC TA +125oC 40
-
40
-
ns
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