4043B outputs Datasheet

4043B Datasheet, PDF, Equivalent


Part Number

4043B

Description

Quadruple R/S latch with 3-state outputs

Manufacture

NXP

Total Page 5 Pages
Datasheet
Download 4043B Datasheet


4043B
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4043B
MSI
Quadruple R/S latch with 3-state
outputs
Product specification
File under Integrated Circuits, IC04
January 1995

4043B
Philips Semiconductors
Quadruple R/S latch with 3-state outputs
DESCRIPTION
The HEF4043B is a quadruple R/S latch with 3-state
outputs with a common output enable input (EO). Each
latch has an active HIGH set input (S0 to S3), an active
HIGH reset input (R0 to R3) and an active HIGH 3-state
output (O0 to O3).
When EO is HIGH, the state of the latch output (On) can be
determined from the function table below. When EO is
LOW, the latch outputs are in the high impedance
OFF-state. EO does not affect the state of the latch.
The high impedance off-state feature allows common
busing of the outputs.
Product specification
HEF4043B
MSI
Fig.2 Pinning diagram.
Fig.1 Functional diagram.
HEF4043BP(N): 16-lead DIL; plastic (SOT38-1)
HEF4043BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)
HEF4043BT(D): 16-lead SO; plastic (SOT109-1)
( ): Package Designator North America
PINNING
EO
S0 to S3
R0 to R3
O0 to O3
common output enable input
set inputs (active HIGH)
reset inputs (active HIGH)
3-state buffered latch outputs
FUNCTION TABLE
INPUTS
EO Sn
LX
HL
HH
HL
Rn
X
H
X
L
OUTPUT
On
Z
L
H
latched
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state immaterial
Z = high impedance state
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
January 1995
2


Features INTEGRATED CIRCUITS DATA SHEET For a co mplete data sheet, please also download : • The IC04 LOCMOS HE4000B Logic Fam ily Specifications HEF, HEC • The IC0 4 LOCMOS HE4000B Logic Package Outlines /Information HEF, HEC HEF4043B MSI Qua druple R/S latch with 3-state outputs P roduct specification File under Integr ated Circuits, IC04 January 1995 Phili ps Semiconductors Product specificati on Quadruple R/S latch with 3-state ou tputs DESCRIPTION The HEF4043B is a qua druple R/S latch with 3-state outputs w ith a common output enable input (EO). Each latch has an active HIGH set input (S0 to S3), an active HIGH reset input (R0 to R3) and an active HIGH 3-state output (O0 to O3). When EO is HIGH, the state of the latch output (On) can be determined from the function table belo w. When EO is LOW, the latch outputs ar e in the high impedance OFF-state. EO d oes not affect the state of the latch. HEF4043B MSI Fig.2 Pinning diagram. T he high impedance off-state feature allows common busing of the outputs.
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