NAND gate. 74F10 Datasheet

74F10 gate. Datasheet pdf. Equivalent


NXP 74F10
INTEGRATED CIRCUITS
74F10 Triple 3-input NAND gate
74F11 Triple 3-input AND gate
Product specification
IC15 Data Handbook
1989 Sep 20
Philips
Semiconductors


74F10 Datasheet
Recommendation 74F10 Datasheet
Part 74F10
Description Triple 3-input NAND gate
Feature 74F10; INTEGRATED CIRCUITS 74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate Product specificat.
Manufacture NXP
Datasheet
Download 74F10 Datasheet




NXP 74F10
Philips Semiconductors
Product specification
Gates
74F10, 74F11
74F10 Triple 3-input NAND gate
74F11 Triple 3-input AND gate
TYPE
74F10
74F11
TYPICAL
PROPAGATION
DELAY
3.5ns
4.2ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
3.3mA
5.3mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
14-pin plastic DIP
N74F10N, N74F11N
14-pin plastic SO
N74F10D, N74F11D
PKG DWG #
SOT27-1
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
Dna, Dnb, Dnc
Data inputs
1.0/1.0
Qn Data output (74F10)
50/33
Qn Data output (74F11)
50/33
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE HIGH/LOW
20µA/0.6mA
1.0mA/20mA
1.0mA/20mA
PIN CONFIGURATIONS
74F10
D0a 1
D0b 2
D1a 3
D1b 4
D1c 5
Q1 6
GND 7
14 VCC
13 D0c
12 Q0
11 D2c
10 D2b
9 D2a
8 Q2
SF00055
D0a 1
D0b 2
D1a 3
D1b 4
D1c 5
Q1 6
GND 7
74F11
14 VCC
13 D0c
12 Q0
11 D2c
10 D2b
9 D2a
8 Q2
SF00056
LOGIC SYMBOLS
74F10
74F11
1 2 13 3 4 5 9 10 11
1 2 13 3 4 5 9 10 11
D0a D0b D0c D1a D1b D1c D2a D2b D2c
Q0 Q1 Q2
VCC = Pin 14
GND = Pin 7
12 6 8
SF00057
D0a D0b D0c D1a D1b D1c D2a D2b D2c
Q0 Q1 Q2
VCC = Pin 14
GND = Pin 7
12 6 8
SF00058
September 20, 1989
2
853–0329 97683



NXP 74F10
Philips Semiconductors
Gates
Product specification
74F10, 74F11
IEC/IEEE SYMBOLS
1
2
13
3
4
5
9
10
11
74F10
&
12
6
8
SF00059
LOGIC DIAGRAMS
74F10
VCC = Pin 14
GND = Pin 7
1
D0a
2
D0b
13
D0c
3
D1a
4
D1b
5
D1c
9
D2a
10
D2b
11
D2c
12
Q0
6
Q1
8
Q2
SF00061
FUNCTION TABLE
INPUTS
Dna Dnb Dnc
LLL
L LH
LHL
L HH
HL L
HLH
HH L
HHH
NOTES:
1. H = High voltage level
2. L = Low voltage level
OUTPUTS
74F10
74F11
Qn Qn
HL
HL
HL
HL
HL
HL
HL
LH
74F11
1&
2
13
3
4
5
9
10
11
12
6
8
SF00060
VCC = Pin 14
GND = Pin 7
74F11
1
D0a
2
D0b
13
D0c
3
D1a
4
D1b
5
D1c
9
D2a
10
D2b
11
D2c
12
Q0
6
Q1
8
Q2
SF00062
September 20, 1989
3







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