7403 Outputs Datasheet

7403 Datasheet, PDF, Equivalent


Part Number

7403

Description

Quad 2-Input NAND Gates with Open-Collector Outputs

Manufacture

Fairchild Semiconductor

Total Page 3 Pages
Datasheet
Download 7403 Datasheet


7403
August 1986
Revised February 2000
DM7403
Quad 2-Input NAND Gates with Open-Collector Outputs
General Description
This device contains four independent gates each of which
performs the logic NAND function. The open-collector out-
puts require external pull-up resistors for proper logical
operation.
Pull-Up Resistor Equations
Where:
N1 (IOH) = total maximum output high current
for all outputs tied to pull-up resistor
N2 (IIH) = total maximum input high current for
all inputs tied to pull-up resistor
N3 (IIL) = total maximum input low current for
all inputs tied to pull-up resistor
Ordering Code:
Order Number Package Number
Package Description
DM7403N
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
Function Table
Y = AB
Inputs
AB
LL
LH
HL
HH
H = HIGH Logic Level
L = LOW Logic Level
Output
Y
H
H
H
L
© 2000 Fairchild Semiconductor Corporation DS006493
www.fairchildsemi.com

7403
Absolute Maximum Ratings(Note 1)
Supply Voltage
7V
Input Voltage
5.5V
Output Voltage
7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range
65°C to +150°C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
VCC
VIH
VIL
VOH
IOL
TA
Parameter
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
LOW Level Output Current
Free Air Operating Temperature
Min
4.75
2
0
Nom
5
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
VI Input Clamp Voltage
ICEX
HIGH Level
Output Current
VOL LOW Level
Output Voltage
II Input Current @ Max Input Voltage
IIH HIGH Level Input Current
IIL LOW Level Input Current
ICCH
Supply Current with Outputs HIGH
ICCL Supply Current with Outputs LOW
Note 2: All typicals are at VCC = 5V, TA = 25°C.
VCC = Min, II = −12 mA
VCC = Min, VO = 5.5V
VIL = Max
VCC = Min, IOL = Max
VIH = Min
VCC = Max, VI = 5.5V
VCC = Max, VI = 2.4V
VCC = Max, VI = 0.4V
VCC = Max
VCC = Max
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol
Parameter
tPLH Propagation Delay Time
LOW-to-HIGH Level Output
tPHL Propagation Delay Time
HIGH-to-LOW Level Output
Conditions
CL = 15 pF
RL = 4 k(tPLH)
RL = 400(tPHL)
Max
Units
5.25
V
V
0.8 V
5.5 V
16 mA
70 °C
Typ
(Note 2)
0.2
4
12
Max
1.5
250
0.4
1
40
1.6
8
22
Units
V
µA
V
mA
µA
mA
mA
mA
Min
Max
Units
45 ns
15 ns
www.fairchildsemi.com
2


Features DM7403 Quad 2-Input NAND Gates with Open -Collector Outputs August 1986 Revised February 2000 DM7403 Quad 2-Input NAN D Gates with Open-Collector Outputs Gen eral Description This device contains f our independent gates each of which per forms the logic NAND function. The open -collector outputs require external pul l-up resistors for proper logical opera tion. Pull-Up Resistor Equations Wher e: N1 (IOH) = total maximum output hig h current for all outputs tied to pull- up resistor N2 (IIH) = total maximum in put high current for all inputs tied to pull-up resistor N3 (IIL) = total maxi mum input low current for all inputs ti ed to pull-up resistor Ordering Code: Order Number DM7403N Package Number N14 A Package Description 14-Lead Plastic D ual-In-Line Package (PDIP), JEDEC MS-00 1, 0.300 Wide Connection Diagram Func tion Table Y = AB Inputs A L L H H H = HIGH Logic Level L = LOW Logic Level O utput B L H L H Y H H H L © 2000 Fair child Semiconductor Corporation DS006493 www.fairchildsemi.com.
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