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TELEVISION CONTROLLERS. Z90202 Datasheet

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TELEVISION CONTROLLERS. Z90202 Datasheet






Z90202 CONTROLLERS. Datasheet pdf. Equivalent




Z90202 CONTROLLERS. Datasheet pdf. Equivalent





Part

Z90202

Description

TELEVISION CONTROLLERS



Feature


Z90209/203/202 Z90209/203/202 TELEVISIO N CONTROLLERS FEATURES s Part Z90209 Z 90203 Z90202 s s s ROM (KB) 16 16 8 R AM* (Kbyte) 236 236 236 Speed Package (MHz) Type 6 124-Pin PGA 6 42-Pin SDIP 6 42-Pin SDIP s s On-Screen Display ( OSD) Logic Circuits One 14-Bit and One 108-Bit Pulse Width Modulator (PWM) Cir cuits 20 Input/Output Lines Program Mem ory, Video RAM, an.
Manufacture

Zilog.

Datasheet
Download Z90202 Datasheet


Zilog. Z90202

Z90202; d Register File Address Spaces Two On-Ch ip Counter/Timers *General-Purpose s 4.5V to 5.5V Operating Range 0°C to + 70°C Temperature Range Low-Power Consu mption s s GENERAL DESCRIPTION The Z9 020X Family of Digital Television Contr ollers are cost-effective members of th e Z8 ® single-chip microcontroller fam ily. The devices provides an ideal perf ormance and reliabili.


Zilog. Z90202

ty solution for consumer and industrial television applications. The Z90209 is the ROMless In-Circuit Emulation (ICE ) Chip version of the Z90200 Digital Tele vision Controller Family used in emulat ors and development boards. The device features an 8-bit internal data path co ntrolled by a Z8 microcontroller, On-Sc reen Display (OSD) logic circuits, and Pulse Width Modula.


Zilog. Z90202

tors (PWM). On-chip peripherals include two register mapped I/O ports (Ports 2 and Port 3), interrupt control logic (o ne software, two external and three int ernal interrupts) and a standby mode re covery input port (Port 3, pin P30). Th e OSD control circuits support ten rows by 24 columns of characters. The chara cter color is specified by character. T he OSD inter-row s.

Part

Z90202

Description

TELEVISION CONTROLLERS



Feature


Z90209/203/202 Z90209/203/202 TELEVISIO N CONTROLLERS FEATURES s Part Z90209 Z 90203 Z90202 s s s ROM (KB) 16 16 8 R AM* (Kbyte) 236 236 236 Speed Package (MHz) Type 6 124-Pin PGA 6 42-Pin SDIP 6 42-Pin SDIP s s On-Screen Display ( OSD) Logic Circuits One 14-Bit and One 108-Bit Pulse Width Modulator (PWM) Cir cuits 20 Input/Output Lines Program Mem ory, Video RAM, an.
Manufacture

Zilog.

Datasheet
Download Z90202 Datasheet




 Z90202
Z90209/203/202
FEATURES
ROM
s Part (KB)
Z90209
16
Z90203
16
Z90202
8
*General-Purpose
RAM*
(Kbyte)
236
236
236
Speed Package
(MHz) Type
6 124-Pin PGA
6 42-Pin SDIP
6 42-Pin SDIP
s 4.5V to 5.5V Operating Range
s 0°C to +70°C Temperature Range
s Low-Power Consumption
Z90209/203/202
TELEVISION CONTROLLERS
s On-Screen Display (OSD) Logic Circuits
s One 14-Bit and One 108-Bit Pulse Width Modulator
(PWM) Circuits
s 20 Input/Output Lines
s Program Memory, Video RAM, and Register File
Address Spaces
s Two On-Chip Counter/Timers
GENERAL DESCRIPTION
The Z9020X Family of Digital Television Controllers are
cost-effective members of the Z8® single-chip
microcontroller family. The devices provides an ideal
performance and reliability solution for consumer and
industrial television applications.
The Z90209 is the ROMless In-Circuit Emulation (ICE )Chip
version of the Z90200 Digital Television Controller Family
used in emulators and development boards.
The device features an 8-bit internal data path controlled
by a Z8 microcontroller, On-Screen Display (OSD) logic
circuits, and Pulse Width Modulators (PWM). On-chip
peripherals include two register mapped I/O ports (Ports 2
and Port 3), interrupt control logic (one software, two
external and three internal interrupts) and a standby mode
recovery input port (Port 3, pin P30).
The OSD control circuits support ten rows by 24 columns
of characters. The character color is specified by character.
The OSD inter-row spacing is variable and can be
programmed from 0 to 15 horizontal scan lines. The OSD
is capable of displaying high resolution (14 x18 dot pattern)
characters.
A 14-bit PWM port provides enough voltage resolution for
a voltage synthesizer tuning system. Ten 8-bit PWM ports
are used for controlling audio signal levels to vary picture
levels.
Three basic address spaces, The Program Memory, Video
RAM, and Register File, support a wide range of memory
configurations.
For applications demanding powerful I/O capabilities, the
Z9020X's dedicated input and output lines are grouped
into three ports, and are configurable under software
control to provide timing, status signals, parallel I/O and an
address/data bus for interfacing to external memory.
To unburden the program from coping with the real-time
problems such as counting/timing and data communication,
the Z9020X offers two on-chip counter/timers with a large
number of user selectable modes.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
VCC
GND
Device
VDD
VSS
245




 Z90202
GENERAL DESCRIPTION (Continued)
XTAL1
XTAL2
/RESET
ADC0
ADC1
ADC2
ADC3
IRIN
P30
P31
P34
P35
Oscillator
WDT
RESET
Counter
Timer
Counter
Timer
3-Bit
ADC
IR
Counter
IR
Counter
Port 3
16K Byte
Program ROM
Z8 CPU
Core
256 Byte
Register File
PWM11
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWM9
PWM10
PWM 11
(14-Bit)
PWM 1
to
PWM 10
(8-Bit)
240 x 11-Bit
and
10 x 8-Bit
Character
RAM
9K x 7-Bit
Character
ROM
Functional Block Diagram
Port 2
Port 4
On-Screen
Display
Z90209/203/202
P20
P21
P22
P23
P24
P25
P26
P27
P40
P41
P42
P43
P44
P45
P46
P47
OSDX1
OSDX2
HSYNC
VSYNC
R
G
B
VBLANK
246







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