TS68302 Processor IMP Datasheet

TS68302 Datasheet, PDF, Equivalent


Part Number

TS68302

Description

Integrated Multiprotocol Processor IMP

Manufacture

ATMEL Corporation

Total Page 30 Pages
Datasheet
Download TS68302 Datasheet


TS68302
Features
TS68000/TS68008 Microprocessor Core Supporting a 16- or 8-bit TS68000 Family
System Integration Block Including:
– Independent Direct Memory Access (IDMA) Controller
– Interrupt Controller with Two Modes of Operation
– Parallel Input/output (I/O) Ports, some with Interrupt Capability
– On-chip Usable 1152 bytes of Dual-port Random-access Memory (RAM)
– Three Timers, including a Watchdog Timer
– Four Programmable Chip-select Lines with Wait-state Logic
– Programmable Address Mapping of Dual-port RAM and IMP Registers
– On-chip Clock Generator with an Output Clock Signal
– System Control:
System Control Register
Bus Arbitration Logic with Low Interrupt Latency Support
Hardware Watchdog for Monitoring Bus Activity
Low Power (Standby) Modes
Disable CPU Logic (TS68000)
Freeze Control for Debugging Selected On-chip Peripherals
DRAM Refresh Controller
Communications Processor Including:
– Main Controller (RISC Processor)
– Three Full-duplex Serial Communication Controllers (SCCs)
– Six Serial Direct Memory Access (SDMA) Channels Dedicated to the Three SCCs
– Flexible Physical Interface Accessible by SCCs for Interchip Digital Link (IDL)
General Circuit Interface (GCI, see note), Pulse Code Modulation (PCM), and
Nonmultiplexed Serial Interface (NMSI) Operation
– Serial Communication Port (SCP) for Synchronous Communication, Clock Rate up
to 4.096 MHz
– Serial Management Controllers (SMCs) for IDL and GCI Channels
Frequency of Operation: 16.67 MHz
Power Supply: 5 VDC ± 10%
Description
The IMP is a very large-scale integration (VLSI) device incorporating the main building
blocks needed for the design of a wide variety of controllers. The device is especially
suitable to applications in the communications industry. The IMP is the first device to
offer the benefits of a closely coupled, industry-standard, TS68000/TS68008 micro-
processor core and a flexible communications architecture. This multichannel
communications device may be configured to support a number of popular industry
interfaces, including those for the integrated services digital network (ISDN) basic rate
and terminal adapter applications. Through a combination of architectural and pro-
grammable features, concurrent operation of different protocols is easily achieved
using the IMP. Data concentrators, line cards, bridges, and gateways are examples of
suitable applications for this versatile device.
The IMP is a high-density complementary metal-oxide semiconductor (HCMOS)
device consisting of a TS68000/TS68008 microprocessor core, a system integration
block (SIB), and a communications processor (CP). The TS68302 block diagram is
shown in Figure 1.
Note: GCI is sometimes referred to as IOM2.
Integrated
Multiprotocol
Processor (IMP)
TS68302
Rev. 2117A–HIREL–11/02
1

TS68302
Screening/Quality
This product is manufactured in full compliance with either:
• MIL-STD-883 (class B)
• DESC. Drawing 5962-93159
• Or according to Atmel standards
R suffix
PGA 132
(Ceramic Pin Grid Array)
A suffix
CERQUAD 132
(Ceramic Quad Flat Pack)
Introduction
The TS68302 integrated multiprotocol processor (IMP) is a very large-scale integration
(VLSI) device incorporating the main building blocks needed for the design of a wide
variety of controllers. The device is especially suitable to applications in the communica-
tions industry. The IMP is the first device to offer the benefits of a closely coupled,
industry-standard TS68000 microprocessor core and a flexible communications archi-
tecture. The IMP may be configured to support a number of popular industry interfaces,
including those for the Integrated Services Digital Network (ISDN) basic rate and termi-
nal adapter applications. Concurrent operation of different protocols is easily achieved
through a combination of architectural and programmable features. Data concentrators,
line cards, bridges, and gateways are examples of suitable applications for this device.
The IMP is a high-density complementary metal-oxide semiconductor (HCMOS) device
consisting of a TS68000 microprocessor core, a system integration block (SIB), and a
communications processor (CP).
Figure 1 is a block diagram of the TS68302. The processor can be divided into two main
sections: the bus controller and the micromachine. This division reflects the autonomy
with which the sections operate.
2 TS68302
2117A–HIREL–11/02


Features Features • TS68000/TS68008 Microproces sor Core Supporting a 16- or 8-bit TS68 000 Family • System Integration Block Including: Independent Direct Memory A ccess (IDMA) Controller Interrupt Contr oller with Two Modes of Operation Paral lel Input/output (I/O) Ports, some with Interrupt Capability On-chip Usable 11 52 bytes of Dual-port Random-access Mem ory (RAM) Three Timers, including a Wat chdog Timer Four Programmable Chip-sele ct Lines with Wait-state Logic Programm able Address Mapping of Dual-port RAM a nd IMP Registers On-chip Clock Generato r with an Output Clock Signal System Co ntrol: System Control Register Bus Arbi tration Logic with Low Interrupt Latenc y Support Hardware Watchdog for Monitor ing Bus Activity Low Power (Standby) Mo des Disable CPU Logic (TS68000) Freeze Control for Debugging Selected On-chip Peripherals DRAM Refresh Controller • Communications Processor Including: Main Controller (RISC Processor) – Three Full-duplex Serial Communication Controllers (SCCs) – Six Serial Di.
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