TS68C429A Transmitter MRT Datasheet

TS68C429A Datasheet, PDF, Equivalent


Part Number

TS68C429A

Description

CMOS ARINC 429 Multichannel Receiver/ Transmitter MRT

Manufacture

ATMEL Corporation

Total Page 30 Pages
Datasheet
Download TS68C429A Datasheet


TS68C429A
Features
8 Independent Receivers (Rx)
3 Independent Transmitters (Tx)
Full TS68K Family Microprocessor Interface Compatibility
16-bit Data-bus
ARINC 429 Interface: “1” and “0” Lines, RZ Code
Support all ARINC 429 Data Rate Transfer and up to 2.5 Mbit/s
Multi Label Capability
Parity Control: Odd, Even, No Parity, Interrupt Capability
Independent Programmable Frequency for Rx and Tx Channels
8 Messages FIFO per Tx Channel
Independent Interrupt Request Line for Rx and Tx Functions
Vectored Interrupts
Daisy Chain Capability
Direct Addressing of all Registers
Test Modes Capability
20 MHz Operating Frequency
Self-test Capability for Receiver Label Memories and Transmit FiFO
Low Power: 400 mW
Description
The TS68C429A is an ARINC 429 controller. It is an enhanced version of the EF 4442
and it is designed to be connected to the new 16- or 32-bit microprocessors, espe-
cially these of the Atmel TS68K family.
Screening
• MIL-STD-883, class B
• DESC Drawing 5962-955180
Atmel Standards
CMOS
ARINC 429
Multichannel
Receiver/
Transmitter
(MRT)
TS68C429A
Application Note
• A detailed application note is available “AN 68C429A” on request.
R suffix
PGA 84
Ceramic Pin Grid Array
F suffix
CQFP 132
Ceramic Quad Flat Pack
Rev. 2120A–HIREL–08/02
1

TS68C429A
Hardware Overview
The TS68C429A is a high performance ARINC 429 controller designed to interface pri-
mary to the Atmel TS68K family microprocessor in a straight forward fashion (see
“Application Notes” on page 33). It can be connected to any TS68K processor family
with an asynchronous bus with some additional logic in some cases.
As shown in Figure 1, the TS68C429A is divided into five main blocks, the microproces-
sor interface unit (MIU), the logical control unit (LCU), the interrupt control unit (ICU), the
receiver channel unit (RCU) and the transmitter channel unit (TCU).
• The MIU handles the interface protocol of the host processor. Through this unit, the
host sees the TS68C429A as a set of registers.
• The LCU controls the internal data flow and initializes the TS68C429A.
• The ICU manages one interrupt line for the RCU and one for the TCU. Each of
these two parts has a daisy chain capability. All channels have a dedicated vectored
interrupt answer. Receiver channels priority is programmable.
• The RCU is composed of 8 ARINC receiver channels made of:
– a serial to parallel converter to translate the two serial signals (the “1” and “0”
in RZ code) into two 16-bit words,
– a memory to store the valid labels,
– a control logic to check the validity of the received message,
– a buffer to keep the last valid received message.
• The TCU is composed of three ARINC transmitter channels made of:
– a parallel to serial converter to translate the messages into two serial signals
(the “1” and “0” in RZ code),
– a FIFO memory to store eight 32-bit ARINC messages,
– a control logic to synchronize the message transmitter (parity, gap, speed,
etc.).
• Test facility: Rx inputs can be internally connected to TX3 output.
• Self-test facility: The receiver control label matrix and transmitter FIFO can be
tested. This self-test can be used to verify the integrity of the TS68C429A
memories.
2 TS68C429A
2120A–HIREL–08/02


Features Features • • • • • • • • • • • • • • • • • 8 Independent Receivers (Rx) 3 Indepe ndent Transmitters (Tx) Full TS68K Fami ly Microprocessor Interface Compatibili ty 16-bit Data-bus ARINC 429 Interface: “1” and “0” Lines, RZ Code Sup port all ARINC 429 Data Rate Transfer a nd up to 2.5 Mbit/s Multi Label Capabil ity Parity Control: Odd, Even, No Parit y, Interrupt Capability Independent Pro grammable Frequency for Rx and Tx Chann els 8 Messages FIFO per Tx Channel Inde pendent Interrupt Request Line for Rx a nd Tx Functions Vectored Interrupts Dai sy Chain Capability Direct Addressing o f all Registers Test Modes Capability 2 0 MHz Operating Frequency Self-test Cap ability for Receiver Label Memories and Transmit FiFO Low Power: 400 mW Descr iption The TS68C429A is an ARINC 429 co ntroller. It is an enhanced version of the EF 4442 and it is designed to be co nnected to the new 16- or 32-bit microp rocessors, especially these of the Atmel TS68K family. CMOS ARINC 429 Multichannel Receiver/ Transmitter (.
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