TN2504 DMOS FETs Datasheet

TN2504 Datasheet, PDF, Equivalent


Part Number

TN2504

Description

N-Channel Enhancement-Mode Vertical DMOS FETs

Manufacture

Supertex Inc

Total Page 5 Pages
Datasheet
Download TN2504 Datasheet


TN2504
TN2504
N-Channel Enhancement-Mode
Vertical DMOS FET
Features
Low threshold (1.6V max.)
High input impedance
Low input capacitance (125pF max.)
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Applications
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
General Description
This low threshold, enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven, silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and the high input
impedance and positive temperature coefficient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally-induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
Ordering Information
Device
Package Option
TO-243AA (SOT-89)
TN2504
TN2504N8-G
-G indicates package is RoHS compliant (‘Green’)
BVDSS/BVDGS
(V)
40
RDS(ON)
(max)
(Ω)
1.0
ID(ON)
(min)
(A)
4.0
VGS(TH)
(max)
(V)
1.6
Pin Configuration
DRAIN
Absolute Maximum Ratings
Parameter
Value
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
BVDSS
BVDGS
±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature*
300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
SOURCE
DRAIN
GATE
TO-243AA (SOT-89) (N8)
Product Marking
TN5LW
W = Code for week sealed
= “Green” Packaging
Package may or may not include the following marks: Si or
TO-243AA (SOT-89) (N8)
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com

TN2504
TN2504
Thermal Characteristics
Package
(continIDuous)
(mA)
ID
(pulsed)
(A)
TO-243AA (SOT-89)
890
Notes:
MID o(cuonntetidnuoonuFs)Ri5s
limited
Board,
b2y5mmmaxxra2t5emdmTj
.
x
1.57mm.
4.5
Power Dissipation
@TA = 25OC
(W)
1.6
θjc
(OC/W)
15
θja
(OC/W)
78
IDR
(mA)
890
IDRM
(A)
4.5
Electrical Characteristics (TA = 25OC unless otherwise specified)
Sym Parameter
Min Typ Max Units Conditions
BVDSS Drain-to-source breakdown voltage
40 - - V VGS = 0V, ID = 2.0mA
VGS(th) Gate threshold voltage
0.6 - 1.6 V VGS = VDS, ID= 1.0mA
ΔVGS(th) Change in VGS(th) with temperature
- -3.8 -4.5 mV/OC VGS = VDS, ID= 1.0mA
IGSS Gate body leakage
- - 100 nA VGS = ± 20V, VDS = 0V
IDSS Zero gate voltage drain current
- - 10 µA VGS = 0V, VDS = Max Rating
-
-
1.0
mA
VDS = 0.8Max Rating,
VGS = 0V, TA = 125°C
ID(ON) On-state drain current
1.0 1.7
4.0 4.5
-
-
A VGS = 5.0V, VDS = 15V
VGS = 10V, VDS = 15V
RDS(ON) Static drain-to-source on-state resistance
- 1.25 1.5
- 0.8 1.0
Ω VGS = 5.0V, ID = 300mA
VGS = 10V, ID = 1.5A
ΔRDS(ON) Change in RDS(ON) with temperature
- - 0.75 %/OC VGS = 10V, ID = 1.5A
GFS Forward transductance
500 700
- mmho VDS = 15V, ID = 2.0A
CISS
COSS
CRSS
Input capacitance
Common source output capacitance
Reverse transfer capacitance
- 70 125
VGS = 0V,
- 50 70 pF VDS = 20V,
- 20 25
f = 1.0MHz
td(ON)
tr
td(OFF)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
- - 10
- - 10
VDD = 20V,
-
-
25
ns ID = 500mA,
RGEN = 25Ω
- - 13
VSD Diode forward voltage drop
- 1.2 1.8 V VGS = 0V, ISD = 1.5A
trr Reverse recovery time
- 300 -
ns VGS = 0V, ISD = 1.0mA
Notes:
1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Switching Waveforms and Test Circuit
10V
INPUT
0V 10%
VDD
OUTPUT
0V
t(ON)
td(ON)
tr
10%
90%
90%
t(OFF)
td(OFF)
tF
10%
90%
PULSE
GENERATOR
RGEN
INPUT
VDD
RL
OUTPUT
D.U.T.
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
2


Features TN2504 N-Channel Enhancement-Mode Verti cal DMOS FET Features ► Low threshol d (1.6V max.) ► High input impedance ► Low input capacitance (125pF max.) ► Fast switching speeds ► Low on-re sistance ► Free from secondary breakd own ► Low input and output leakage Ap plications ► Logic level interfaces - ideal for TTL and CMOS ► Solid state relays ► Battery operated systems Photo voltaic drives ► Analog switc hes ► General purpose line drivers Telecom switches General Description This low threshold, enhancement-mode ( normally-off) transistor utilizes a ver tical DMOS structure and Supertex’s w ell-proven, silicon-gate manufacturing process. This combination produces a de vice with the power handling capabiliti es of bipolar transistors and the high input impedance and positive temperatur e coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runawa y and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited t.
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