DatasheetsPDF.com

SN54LS109A

Motorola  Inc

DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP


Description
SN54/74LS109A DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/ 74LS109A consists of two high speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D flip-flop by simply connecting the J and K pins together. LOGIC DIAGRAM DUAL J...



Motorola Inc

SN54LS109A

File Download Download SN54LS109A Datasheet


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)