P89C669 microcontroller Datasheet

P89C669 Datasheet, PDF, Equivalent


Part Number

P89C669

Description

80C51 8-bit microcontroller

Manufacture

NXP

Total Page 30 Pages
Datasheet
Download P89C669 Datasheet


P89C669
P89C669
80C51 8-bit microcontroller family with extended memory;
96 kB Flash with 2 kB RAM
Rev. 02 — 13 November 2003
Product data
1. General description
The P89C669 represents the first Flash microcontroller based on Philips
Semiconductors’ new 51MX core. The P89C669 features 96 kbytes of Flash program
memory and 2 kbytes of data SRAM. In addition, this device is equipped with a
Programmable Counter Array (PCA), a watchdog timer that can be configured to
different time ranges through SFR bits, as well as two enhanced UARTs and byte
based I2C-bus serial interface.
Philips Semiconductors’ 51MX (Memory eXtension) core is an accelerated 80C51
architecture that executes instructions at twice the rate of standard 80C51 devices.
The linear address range of the 51MX has been expanded to support up to 8 Mbytes
of program memory and 8 Mbytes of data memory. It retains full program code
compatibility to enable design engineers to re-use 80C51 development tools,
eliminating the need to move to a new, unfamiliar architecture. The 51MX core also
retains 80C51 bus compatibility to allow for the continued use of 80C51-interfaced
peripherals and Application Specific Integrated Circuits (ASICs).
The P89C669 provides greater functionality, increased performance and overall lower
system cost. By offering an embedded memory solution combined with the
enhancements to manage the memory extension, the P89C669 eliminates the need
for software work-arounds. The increased program memory enables design
engineers to develop more complex programs in a high-level language like C, for
example, without struggling to contain the program within the traditional 64 kbytes of
program memory. These enhancements also greatly improve C Language efficiency
for code size below 64 kbytes.
The P89C669 device contains a non-volatile Flash program memory that is both
parallel programmable and serial In-System and In-Application Programmable.
In-System Programming (ISP) allows the user to download new code while the
microcontroller sits in the application. In-Application Programming (IAP) means that
the microcontroller fetches new program code and reprograms itself while in the
system. This allows for remote programming over a modem link. A default serial
loader (boot loader) program in ROM allows serial In-System programming of the
Flash memory via the UART without the need for a loader in the Flash code. For
In-Application Programming, the user program erases and reprograms the Flash
memory by use of standard routines contained in ROM.
The 51MX core is described in more detail in the 51MX Architecture Reference.

P89C669
Philips Semiconductors
P89C669
80C51 8-bit microcontroller family with extended memory
2. Features
9397 750 12299
Product data
2.1 Key features
s Extended features of the 51MX Core:
x 23-bit program memory space and 23-bit data memory space
x Linear program and data address range expanded to support up to 8 Mbytes
each
x Program counter expanded to 23 bits
x Stack pointer extended to 16 bits enabling stack space beyond the 80C51
limitation
x New 23-bit extended data pointer and two 24-bit universal pointers greatly
improve C compiler code efficiency in using pointers to access variables in
different spaces
s 100% binary compatibility with the classic 80C51 so that existing code is
completely reusable
s Up to 24 MHz CPU clock with 6 clock cycles per machine cycle
s 96 kbytes of on-chip program Flash
s 2 kbytes of on-chip data RAM
s Programmable Counter Array (PCA)
s Two full-duplex enhanced UARTs
s Byte based Fast I2C serial interface (400 kbits/s)
2.2 Key benefits
s Increases program/data address range to 8 Mbytes each
s Enhances performance and efficiency for C programs
s Fully 80C51-compatible microcontroller
s Provides seamless and compelling upgrade path from classic 80C51
s Preserves 80C51 code base, investment/knowledge, and peripherals and ASICs
s Supported by wide range of 80C51 development systems and programming tools
vendors
s The P89C669 makes it possible to develop applications at lower cost and with a
reduced time-to-market
2.3 Complete features
s Fully static
s Up to 24 MHz CPU clock with 6 clock cycles per machine cycle
s 96 kbytes of on-chip Flash with In-System Programming (ISP) and In-Application
Programming (IAP) capability
s 2 kbytes of on-chip RAM
s 23-bit program memory space and 23-bit data memory space
s Four-level interrupt priority
s 32 I/O lines (4 ports)
s Three Timers: Timer0, Timer1 and Timer2
s Two full-duplex enhanced UARTs with baud rate generator
Rev. 02 — 13 November 2003
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
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Features P89C669 80C51 8-bit microcontroller fami ly with extended memory; 96 kB Flash wi th 2 kB RAM Rev. 02 — 13 November 200 3 Product data 1. General description The P89C669 represents the first Flash microcontroller based on Philips Semic onductors’ new 51MX core. The P89C669 features 96 kbytes of Flash program me mory and 2 kbytes of data SRAM. In addi tion, this device is equipped with a Pr ogrammable Counter Array (PCA), a watch dog timer that can be configured to di fferent time ranges through SFR bits, a s well as two enhanced UARTs and byte b ased I2C-bus serial interface. Philips Semiconductors’ 51MX (Memory eXtensio n) core is an accelerated 80C51 archite cture that executes instructions at twi ce the rate of standard 80C51 devices. The linear address range of the 51MX ha s been expanded to support up to 8 Mbyt es of program memory and 8 Mbytes of da ta memory. It retains full program code compatibility to enable design enginee rs to re-use 80C51 development tools, eliminating the need to move to a n.
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