2001.July Rev.0.1
MITSUBISHI LSIs
Advanced Information
Notice: This is not final specification. Some parametric limits are subject to change.
M5M5V5636GP –16
18874368-BIT(524288-WORD BY 36-BIT) NETWORK SRAM
DESCRIPTION
The M5M5V5636GP is a family of 18M bit synchronous SRAMs organized as 524288-words by 36-bit. It is designed to eliminate dead bus cycles...
