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74LVC2G38 Datasheet, Equivalent, NAND gate.Dual 2-input NAND gate Dual 2-input NAND gate |
| Part | 74LVC2G38 |
|---|---|
| Description | Dual 2-input NAND gate |
| Feature | 74LVC2G38
Dual 2-input NAND gate; open d rain
Rev. 11 — 8 April 2013 Product data sheet 1. General description The 74LVC2G38 provides a 2-input NAND funct ion. The outputs of the 74LVC2G38 devic es are open-drain and can be connected to other open-drain outputs to implemen t active-LOW, wired-OR or active-HIGH w ired-AND functions. Inputs can be drive n from either 3. 3 V or 5 V devices. Thi s feature allows the use of these devic es as translators in a mixed 3. 3 V and 5 V environment. This device is fully s pecified for partial power-down applica tions using IOFF. The IOFF circuitry di sables the outpu . |
| Manufacture | NXP |
| Datasheet |
| Part | 74LVC2G38 |
|---|---|
| Description | Dual 2-input NAND gate |
| Feature | 74LVC2G38
Dual 2-input NAND gate; open d rain
Rev. 11 — 8 April 2013 Product data sheet 1. General description The 74LVC2G38 provides a 2-input NAND funct ion. The outputs of the 74LVC2G38 devic es are open-drain and can be connected to other open-drain outputs to implemen t active-LOW, wired-OR or active-HIGH w ired-AND functions. Inputs can be drive n from either 3. 3 V or 5 V devices. Thi s feature allows the use of these devic es as translators in a mixed 3. 3 V and 5 V environment. This device is fully s pecified for partial power-down applica tions using IOFF. The IOFF circuitry di sables the outpu . |
| Manufacture | NXP |
| Datasheet |
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